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The Impact of Logic Gates Susceptibility in Overall Circuit Reliability Analysis.
Matheus F. Pontes
Ingrid F. V. Oliveira
Rafael B. Schvittz
Leomar S. Rosa
Paulo F. Butzen
Published in:
ISCAS (2022)
Keyphrases
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reliability analysis
logic circuits
low power
logic synthesis
delay insensitive
digital circuits
logic programming
power dissipation
power consumption
modal logic
fault tree
decision trees
chip design
condition monitoring
object oriented
management system
control system