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Defect-robust FPGA architectures for intellectual property cores in system LSI.
Motoki Amagasaki
Kazuki Inoue
Qian Zhao
Masahiro Iida
Morihiro Kuga
Toshinori Sueyoshi
Published in:
FPL (2013)
Keyphrases
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intellectual property
patent search
high speed
hardware implementation
clef ip
e government
latent semantic indexing
patent documents
patent information
signal processing
vector space
real time image processing
fpga implementation