Parallel Architecture With Resistive Crosspoint Array for Dictionary Learning Acceleration.
Deepak KadetotadZihan XuAbinash MohantyPai-Yu ChenBinbin LinJieping YeSarma B. K. VrudhulaShimeng YuYu CaoJae-sun SeoPublished in: IEEE J. Emerg. Sel. Topics Circuits Syst. (2015)
Keyphrases
- dictionary learning
- parallel architecture
- systolic array
- sparse representation
- sparse coding
- parallel processing
- shared memory
- hardware implementation
- high level synthesis
- distributed memory
- parallel implementation
- natural images
- parallel algorithm
- small number
- unsupervised learning
- signal processing
- object recognition
- face recognition