Microarchitecture and implementation of the synergistic processor in 65-nm and 90-nm SOI.
Brian K. FlachsShigehiro AsanoSang H. DhongH. Peter HofsteeGilles GervaisRoy KimTien LePeichun LiuJens LeenstraJohn S. LibertyBrad W. MichaelHwa-Joon OhSilvia M. MüllerOsamu TakahashiKoji HirairiAtsushi KawasumiHiroaki MurakamiHiromi NoroShoji OnishiJuergen PilleJoel SilbermanSuksoon YongAkiyuki HatakeyamaYukio WatanabeNaoka YanoDaniel A. BrokenshireMohammad PeyravianVanDung ToEiji IwataPublished in: IBM J. Res. Dev. (2007)
Keyphrases
- silicon on insulator
- cmos technology
- early stage
- parallel processing
- circuit design
- dynamic random access memory
- high speed
- efficient implementation
- cell broadband engine architecture
- neural network
- general purpose
- parallel architecture
- input output
- instruction set
- transmission electron microscopy
- infrared
- video sequences