Login / Signup
Test Cost Reduction Methodology for InFO Wafer-Level Chip-Scale Package.
Kai-Li Wang
Bing-Yang Lin
Cheng-Wen Wu
Mincent Lee
Hao Chen
Hung-Chih Lin
Ching-Nen Peng
Min-Jer Wang
Published in:
IEEE Des. Test (2017)
Keyphrases
</>
cost reduction
cost savings
high speed
test cases
reinforcement learning
semiconductor manufacturing