2 GHz 2 Mb 2T Gain Cell Memory Macro With 128 GBytes/sec Bandwidth in a 65 nm Logic Process Technology.
Dinesh SomasekharYibin YePaolo A. AseronShih-Lien LuMuhammad M. KhellahJason HowardGregory RuhlTanay KarnikShekhar BorkarVivek K. DeAli KeshavarziPublished in: IEEE J. Solid State Circuits (2009)