An M-Cache-Based Security Monitoring and Fault Recovery Architecture for Embedded Processor.
Xiang WangZongmin ZhaoDongdong XuZhun ZhangQiang HaoMengchen LiuPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2020)
Keyphrases
- embedded processors
- dynamic random access memory
- memory hierarchy
- normal operation
- multithreading
- memory subsystem
- instruction set
- real time
- memory access
- single chip
- error detection
- parallel architecture
- fault detection
- failure detection
- multi processor
- memory management
- parallel implementation
- computer architecture
- fault diagnosis
- monitoring system
- information security
- main memory
- management system
- cyber physical systems
- situational awareness
- network security
- condition monitoring
- intrusion detection
- processor core
- low cost
- shared memory multiprocessors
- software architecture
- complex event processing
- industry standard
- data access
- security policies
- parallel computing