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Capture power reduction using clock gating aware test generation.

Krishna ChakravadhanulaVivek ChickermaneBrion L. KellerPatrick R. Gallagher Jr.Prashant Narang
Published in: ITC (2009)
Keyphrases
  • power reduction
  • test generation
  • power consumption
  • low power
  • test cases
  • clock gating
  • power saving
  • quality assurance
  • static analysis
  • software testing
  • multithreading
  • power dissipation
  • high speed
  • memory efficient