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Error-Resilient Integrated Clock Gate for Clock-Tree Power Optimization on a Wide Voltage IOT Processor.
Tao-Tao Zhu
Jian-Yi Meng
Xiaoyan Xiang
Xiaolang Yan
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2017)
Keyphrases
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duty cycle
power consumption
error resilient
high speed
power losses
clock frequency
error propagation
bitstream
low power
video streaming
error concealment
coding scheme
error detection
compressed video
cmos technology