• search
    search
  • reviewers
    reviewers
  • feeds
    feeds
  • assignments
    assignments
  • settings
  • logout

A 5GHz Digital Fractional-N PLL Using a 1-bit Delta-Sigma Frequency-to-Digital Converter in 65 nm CMOS.

Mrunmay TalegaonkarTejasvi AnandAhmed ElkholyAmr ElshazlyRomesh Kumar NandwanaSaurabh SaxenaBrian YoungWoo-Seok ChoiPavan Kumar Hanumolu
Published in: IEEE J. Solid State Circuits (2017)
Keyphrases
  • analog to digital converter
  • delta sigma
  • high speed
  • mixed signal
  • image sensor
  • low power
  • cmos technology
  • data conversion