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Multi-Bit Pulsed-Latch Based Low Power Synchronous Circuit Design.
Kamlesh Singh
Omar Alejandro Rodriguez Rosas
Hailong Jiao
Jos Huisken
José Pineda de Gyvez
Published in:
ISCAS (2018)
Keyphrases
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low power
circuit design
power consumption
low cost
high speed
design automation
single chip
power reduction
digital signal processing
digital circuits
logic circuits
high power
wireless transmission
vlsi architecture
low power consumption
vlsi circuits
cmos technology
signal processing
gate array