A Variable-Grain Logic Cell and Routing Architecture for a Reconfigurable IP Core.
Kazuki InoueQian ZhaoYasuhiro OkamotoHiroki YoshoMotoki AmagasakiMasahiro IidaToshinori SueyoshiPublished in: ACM Trans. Reconfigurable Technol. Syst. (2010)
Keyphrases
- management system
- hardware implementation
- low cost
- systolic array
- logic programming
- routing problem
- dynamic reconfiguration
- modal logic
- heterogeneous computing
- reconfigurable architecture
- logic synthesis
- functional units
- reasoning engine
- shortest path
- general purpose
- neural network
- network architecture
- data flow
- network topology
- design methodology
- digital circuits
- temporal logic
- routing protocol
- knowledge representation
- real time