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Improving CNF representations in SAT-based ATPG for industrial circuits using BDDs.
Daniel Tille
Stephan Eggersglüß
Rene Krenz-Baath
Jürgen Schlöffel
Rolf Drechsler
Published in:
ETS (2010)
Keyphrases
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sat solvers
knowledge compilation
industrial applications
answer set programming
heuristic search
sat solving
high speed
ai planning
bounded model checking
low power
logic circuits
sat encodings