Login / Signup
A 10-b 320-MS/s Stage-Gain-Error Self-Calibration Pipeline ADC.
Chien-Jian Tseng
Hung-Wei Chen
Wei-Ting Shen
Wei-Chih Cheng
Hsin-Shu Chen
Published in:
IEEE J. Solid State Circuits (2012)
Keyphrases
</>
error rate
error analysis
camera parameters
projective camera
camera calibration
closed form
focal length
relative error
processing pipeline
pipeline architecture
real time
neural network
face recognition
error detection
euclidean reconstruction
multiple stages