Zibin Dai

Publication Activity (10 Years)

Years Active: 2007-2024
Publications (10 Years): 15

Top Topics

Integrated Circuit

Comprehensive Evaluation

Generalized Regression Neural Network

Top Venues

ACM Trans. Design Autom. Electr. Syst.

IEICE Electron. Express

UIC/ATC/ScalCom

Publications

Danping Jiang, Zibin Dai, Yanjiang Liu, Zongren Zhang
RGMU: A High-flexibility and Low-cost Reconfigurable Galois Field Multiplication Unit Design Approach for CGRCA. ACM Trans. Design Autom. Electr. Syst. 29 (2) (2024)
Pengfei Guo, Yingjian Yan, Zhongyi Zhao, Lichao Zhang, Chunsheng Zhu, Zibin Dai
R/B-SecArch: A strong isolated SoC architecture based on red/black concept for secure and efficient cryptographic services. Microelectron. J. 142 (2023)
Yanjiang Liu, Junwei Li, Tongzhou Qu, Zibin Dai
CBDC-PUF: A Novel Physical Unclonable Function Design Framework Utilizing Configurable Butterfly Delay Chain Against Modeling Attack. ACM Trans. Design Autom. Electr. Syst. 28 (5) (2023)
Yanjiang Liu, Gaofeng Huang, Junwei Li, Pengfei Guo, Chunsheng Zhu, Zibin Dai
MA-GRNN:a high-efficient modeling attack approach utilizing generalized regression neural network for XOR arbiter physical unclonable functions. IEICE Electron. Express 20 (13) (2023)
Pengfei Guo, Yingjian Yan, Fan Zhang, Chunsheng Zhu, Lichao Zhang, Zibin Dai
Extending the classical side-channel analysis framework to access-driven cache attacks. Comput. Secur. 129 (2023)
Yanjiang Liu, Jiaji He, Haocheng Ma, Tongzhou Qu, Zibin Dai
A Comprehensive Evaluation of Integrated Circuits Side-Channel Resilience Utilizing Three-Independent-Gate Silicon Nanowire Field Effect Transistors-Based Current Mode Logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Tongzhou Qu, Zibin Dai, Yanjiang Liu, Lin Chen, Xianzhao Xia
A Performance Model for Reconfigurable Block Cipher Array Utilizing Amdahl's Law. IEICE Trans. Inf. Syst. (5) (2022)
Yanjiang Liu, Xianzhao Xia, Jingxin Zhong, Pengfei Guo, Chunsheng Zhu, Zibin Dai
A Cost-Sensitive Golden Chip-Free Hardware Trojan Detection Using Principal Component Analysis and Naïve Bayes Classification Algorithm. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2022)
Yanjiang Liu, Tongzhou Qu, Zibin Dai
A Low-Overhead and High-Security Cryptographic Circuit Design Utilizing the TIGFET-Based Three-Phase Single-Rail Pulse Register against Side-Channel Attacks. ACM Trans. Design Autom. Electr. Syst. 27 (4) (2022)
Yiran Du, Wei Li, Zibin Dai, Longmei Nan
PVHArray: An Energy-Efficient Reconfigurable Cryptographic Logic Array With Intelligent Mapping. IEEE Trans. Very Large Scale Integr. Syst. 28 (5) (2020)
Danyang Yang, Zibin Dai, Wei Li, Tao Chen
An Efficient ASIC Implementation of Public Key Cryptography Algorithm SM2 Based on Module Arithmetic Logic Unit. ASICON (2019)
Longmei Nan, Xiaoyang Zeng, Wei Li, Zhouchuang Wang, Zibin Dai
A single-supply sub-threshold level shifter with an internal supply feedback loop for multi-voltage applications. IEICE Electron. Express 15 (5) (2018)
Anqi Yin, Zibin Dai, Longmei Nan, Wei Li
RC6 architecture-adaptive implementation for coarse-grained reconfiguration array. ASICON (2017)
Chao Ma, Zibin Dai, Wei Li, Hai-juan Zang
A highly efficient reconfigurable rotation unit based on an inverse butterfly network. Frontiers Inf. Technol. Electron. Eng. 18 (11) (2017)
Tongzhou Qu, Zibin Dai, Longmei Nan, Wei Li, Anqi Yin
An area-efficient interconnection network for coarse-grain reconfigurable cryptographic array. ASICON (2017)
Junwei Li, Zibin Dai, Wei Li, Tao Chen, Yufei Zhu
Study and implementation of cluster hierarchical memory system of multicore cryptographic processor. ASICON (2015)
Wei Li, Zhongxiang Chang, Xiao Feng, Zibin Dai
Fast Parallel Extract-Shift and Parallel Deposit-Shift in General-Purpose Processors. UIC/ATC/ScalCom (2015)
Wei Li, Xiaoyang Zeng, Xiao Feng, Zibin Dai
A High-Throughput Processor for Dual-Field Elliptic Curve Cryptography with Power Analysis Resistance. UIC/ATC/ScalCom (2015)
Zibin Dai, Longmei Nan, Xuan S. Yang, Xiaonan Li
Design and Implementation of Configurable LFSR Instructions Targeted at Stream Cipher Processing. J. Circuits Syst. Comput. 22 (10) (2013)
Wei Li, Xuan Yang, Zibin Dai
Research on design of a reconfigurable parallel structure targeted at LFSR. ASICON (2011)
Jianbo Xu, Zibin Dai, Yang Xuan, Yang Su
field of symmetric cryptography. ASICON (2011)
Lulu Feng, Zibin Dai, Wei Li, Jianlei Cheng
Design and application of reusable SoC verification platform. ASICON (2011)
Yalei Cui, Zibin Dai
The Research of NULL Convention Logic Circuit Computing Model Targeted at Block Cipher Processing. IAS (2009)
Zibin Dai, Wei Li, Xiaohui Yang, Tao Chen, Qiao Ren
The Research and Implementation of Reconfigurable Processor Architecture for Block Cipher Processing. ICESS (2008)
Wei Li, Zibin Dai, Tao Chen, Tao Meng, Xuan S. Yang
Design and Implementation of a High-Speed Reconfigurable Modular Arithmetic Unit. APPT (2007)