Yuze Chi

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 44

Top Topics

Physical Design

Rolling Horizon

Parallel Implementation

Similarity Computation

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Publications

Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. ASPLOS (3) (2024)
Yuze Chi, Weikang Qiao, Atefeh Sohrabizadeh, Jie Wang, Jason Cong
Democratizing Domain-Specific Computing. Commun. ACM 66 (1) (2023)
Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang
SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. ACM Trans. Reconfigurable Technol. Syst. 16 (2) (2023)
Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. FPGA (2023)
Moazin Khatti, Xingyu Tian, Yuze Chi, Licheng Guo, Jason Cong, Zhenman Fang
PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. FCCM (2023)
Young Kyu Choi, Yuze Chi, Jason Lau, Jason Cong
TARO: Automatic Optimization for Free-Running Kernels in FPGA High-Level Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (7) (2023)
Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong
TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design. ACM Trans. Reconfigurable Technol. Syst. 16 (4) (2023)
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Eddie Hung, Wuxi Li, Jason Lau, Weikang Qiao, Yuze Chi, Linghao Song, Yuanlong Xiao, Alireza Kaviani, Zhiru Zhang, Jason Cong
RapidStream 2.0: Automated Parallel Implementation of Latency-Insensitive FPGA Designs Through Partial Reconfiguration. ACM Trans. Reconfigurable Technol. Syst. 16 (4) (2023)
Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong
TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. CoRR (2023)
Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang
SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. CoRR (2022)
Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong
RapidStream: Parallel Physical Implementation of FPGA HLS Designs. FPGA (2022)
Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design. CoRR (2022)
Yuze Chi, Weikang Qiao, Atefeh Sohrabizadeh, Jie Wang, Jason Cong
Democratizing Domain-Specific Computing. CoRR (2022)
Atefeh Sohrabizadeh, Yuze Chi, Jason Cong
SPA-GCN: Efficient and Flexible GCN Accelerator with Application for Graph Similarity Computation. FPGA (2022)
Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong
Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. CoRR (2022)
Yuze Chi, Licheng Guo, Jason Cong
Accelerating SSSP for Power-Law Graphs. FPGA (2022)
Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. FPGA (2022)
Linghao Song, Yuze Chi, Jason Cong
PYXIS: An Open-Source Performance Dataset Of Sparse Accelerators. ICASSP (2022)
Linghao Song, Yuze Chi, Licheng Guo, Jason Cong
Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication. DAC (2022)
Atefeh Sohrabizadeh, Yuze Chi, Jason Cong
StreamGCN: Accelerating Graph Convolutional Networks with Streaming Processing. CICC (2022)
Yuze Chi, Licheng Guo, Jason Lau, Young-kyu Choi, Jie Wang, Jason Cong
Extending High-Level Synthesis for Task-Parallel Programs. FCCM (2021)
Atefeh Sohrabizadeh, Yuze Chi, Jason Cong
SPA-GCN: Efficient and Flexible GCN Accelerator with an Application for Graph Similarity Computation. CoRR (2021)
Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong
Extending High-Level Synthesis for Task-Parallel Programs. FPGA (2021)
Linghao Song, Yuze Chi, Licheng Guo, Jason Cong
Serpens: A High Bandwidth Memory Based Accelerator for General-Purpose Sparse Matrix-Vector Multiplication. CoRR (2021)
Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang, Jason Cong
AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. FPGA (2021)
Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong
Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. CoRR (2021)
Linghao Song, Yuze Chi, Jason Cong
Pyxis: An Open-Source Performance Dataset of Sparse Accelerators. CoRR (2021)
Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic, Jason Cong
HBM Connect: High-Performance HLS Interconnect for FPGA HBM. FPGA (2021)
Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong
Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. DAC (2020)
Yuze Chi, Jason Cong
Exploiting Computation Reuse for Stencil Accelerators. DAC (2020)
Jiajie Li, Yuze Chi, Jason Cong
HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration. FPGA (2020)
Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong
Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. FPGA (2020)
Young-kyu Choi, Yuze Chi, Jie Wang, Licheng Guo, Jason Cong
When HLS Meets FPGA HBM: Benchmarking and Bandwidth Optimization. CoRR (2020)
Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong
Extending High-Level Synthesis for Task-Parallel Programs. CoRR (2020)
Young-kyu Choi, Yuze Chi, Jie Wang, Jason Cong
FLASH: Fast, Parallel, and Accurate Simulator for HLS. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (12) (2020)
Guohao Dai, Tianhao Huang, Yuze Chi, Jishen Zhao, Guangyu Sun, Yongpan Liu, Yu Wang, Yuan Xie, Huazhong Yang
GraphH: A Processing-in-Memory Architecture for Large-Scale Graph Processing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (4) (2019)
Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, Jason Cong, Zhiru Zhang
HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. FPGA (2019)
Yuze Chi, Young-kyu Choi, Jason Cong, Jie Wang
Rapid Cycle-Accurate Simulator for High-Level Synthesis. FPGA (2019)
Yuze Chi, Young-kyu Choi, Jason Cong, Jie Wang
Rapid Cycle-Accurate Simulator for High-Level Synthesis. CoRR (2018)
Yuze Chi, Jason Cong, Peng Wei, Peipei Zhou
SODA: stencil with optimized dataflow architecture. ICCAD (2018)
Yuze Chi, Peipei Zhou, Jason Cong
An Optimal Microarchitecture for Stencil Computation with Data Reuse and Fine-Grained Parallelism: (Abstract Only). FPGA (2018)
Guohao Dai, Tianhao Huang, Yuze Chi, Ningyi Xu, Yu Wang, Huazhong Yang
ForeGraph: Exploring Large-scale Graph Processing on Multi-FPGA Architecture. FPGA (2017)
Guohao Dai, Yuze Chi, Yu Wang, Huazhong Yang
FPGP: Graph Processing Framework on FPGA A Case Study of Breadth-First Search. FPGA (2016)
Yuze Chi, Guohao Dai, Yu Wang, Guangyu Sun, Guoliang Li, Huazhong Yang
NXgraph: An efficient graph processing system on a single machine. ICDE (2016)
Yuze Chi, Guohao Dai, Yu Wang, Guangyu Sun, Guoliang Li, Huazhong Yang
NXgraph: An Efficient Graph Processing System on a Single Machine. CoRR (2015)