Yuan-Kai Ho

Publication Activity (10 Years)

Years Active: 2008-2014
Publications (10 Years): 0

Top Topics

Evolvable Hardware

Programmable Logic

Physical Design

Routing Problem

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Yuan-Kai Ho, Hsu-Chieh Lee, Webber Lee, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen
Obstacle-Avoiding Free-Assignment Routing for Flip-Chip Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (2) (2014)
Yuan-Kai Ho, Hsu-Chieh Lee, Yao-Wen Chang
Escape Routing for Staggered-Pin-Array PCBs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (9) (2013)
Yuan-Kai Ho, Xin-Wei Shih, Yao-Wen Chang, Chung-Kuan Cheng
Layer minimization in escape routing for staggered-pin-array PCBs. ASP-DAC (2013)
Yuan-Kai Ho, Yao-Wen Chang
Multiple chip planning for chip-interposer codesign. DAC (2013)
Po-Wei Lee, Hsu-Chieh Lee, Yuan-Kai Ho, Yao-Wen Chang, Chen-Feng Chang, I-Jye Lin, Chin-Fang Shen
Obstacle-avoiding free-assignment routing for flip-chip designs. DAC (2012)
Yuan-Kai Ho, Hsu-Chieh Lee, Yao-Wen Chang
Escape routing for staggered-pin-array PCBs. ICCAD (2011)
Xin-Wei Shih, Chung-Chun Cheng, Yuan-Kai Ho, Yao-Wen Chang
Blockage-avoiding buffered clock-tree synthesis for clock latency-range and skew minimization. ASP-DAC (2010)
Chia-Ming Chang, Shih-Hsu Huang, Yuan-Kai Ho, Jia-Zong Lin, Hsin-Po Wang, Yu-Sheng Lu
Type-matching clock tree for zero skew clock gating. DAC (2008)