Multiple chip planning for chip-interposer codesign.

Yuan-Kai Ho Yao-Wen Chang

Published in: DAC (2013)

Keyphrases

high speed
analog vlsi
low cost
programmable logic
high density
solid models
vlsi design
physical design
single chip
search space
domain independent
neural network
image sensor
high bandwidth
multithreading
evolvable hardware
multiple objects
planning problems
host computer