Yu-Cheng Yao

Publication Activity (10 Years)

Years Active: 2016-2019
Publications (10 Years): 5

Top Topics

Parallel Architecture

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Kaustubh Joshi, Yung-Huei Lee, Yu-Cheng Yao, Shu-Wen Chang, Siao-Syong Bian, P. J. Liao, Jiaw-Ren Shih, Min-Jan Chen
A Statistical Learning Model for Accurate Prediction of Time-Dependent Dielectric Degradation for Low Failure Rates. IRPS (2019)
Chun-Yi Liu, Meng-Siou Sie, Edmund Wen Jen Leong, Yu-Cheng Yao, Chih-Wei Jen, Wei-Chang Liu, Chih-Feng Wu, Shyh-Jye Jou
Dual-Mode All-Digital Baseband Receiver With a Feed-Forward and Shared-Memory Architecture for Dual-Standard Over 60 GHz NLOS Channel. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2017)
Chun-Yi Liu, Yu-Cheng Yao, Meng-Siou Sie, Edmund Wen Jen Leong, Henry Lopez Davila, Chih-Wei Jen, Shyh-Jye Jou
Residual sampling clocking offset estimation and compensation for FBMC-OQAM baseband receiver in the 60 GHz band. ISCAS (2017)
Chun-Yi Liu, Meng-Siou Sie, Edmund Wen Jen Leong, Yu-Cheng Yao, Chih-Wei Jen, Shyh-Jye Jou
A memory access reordering polyphase network for 60 GHz FBMC-OQAM baseband receiver. ISCAS (2016)
Chun-Yi Liu, Meng-Siou Sie, Edmund Wen Jen Leong, Yu-Cheng Yao, Henry Lopez Davila, Chih-Wei Jen, Wei-Chang Liu, Shyh-Jye Jou
An 8X-Parallelism Memory Access Reordering Polyphase Network for 60 GHz FBMC-OQAM Baseband Receiver. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2016)