Yi-Hsin Wu

Publication Activity (10 Years)

Years Active: 2009-2021
Publications (10 Years): 6

Top Topics

Customer Orders

Printed Circuit Boards

Programmable Logic

Built In Self Test

Top Venues

J. Inf. Sci. Eng.

Publications

Christian John Immanuel S. Boydon, Yi-Hsin Wu, Cheng-Hung Wu
Data-driven Scheduling for High-mix and Low-volume Production in Semiconductor Assembly and Testing. CASE (2021)
Yi-Hsin Wu, Jui-Yu Huang, Yi-Chun Yao, Yin-Jing Tien, Cheng-Juei Yu, Sheng-De Wang
Detecting and Scoring Equipment Faults in Real Time During Semiconductor Test Processes. IEEE Des. Test 38 (4) (2021)
Yi-Hsin Wu, Yu-Hsin Chang, Yin-Jing Tien, Cheng-Juei Yu, Sheng-De Wang, Cheng-Hung Wu
Using Partial Combination Models to Improve Prediction Quality and Transparency in Mixed Datasets. IEEE Access 8 (2020)
Cheng-Juei Yu, Yi-Hsin Wu, Sheng-De Wang
An Approach to the Design of Specific Hardware Circuits from C Programs. J. Inf. Sci. Eng. 34 (2) (2018)
Yi-Hsin Wu, Sheng-De Wang, Li-Jung Chen, Cheng-Juei Yu
Streaming analytics processing in manufacturing performance monitoring and prediction. IEEE BigData (2017)
Chih-Hua Tai, Tsung-Han Lee, Sheng-Hao Chiang, Jui-Yi Tsai, De-Nian Yang, Yi-Hsin Wu, Ya-Huei Chan
On recommendation of graph mining algorithms for different data. BigComp (2016)
Hsiu-Min Lin, Cheng-Ying Ho, Wen-Lin Chen, Yi-Hsin Wu, De-Hui Wang, Jun-Ren Lin, Yu-Hui Wu, Huei-Cheng Hong, Zhi-Wei Lin, Jenq-Gong Duh
Interfacial reaction and mechanical evaluation in multi-level assembly joints with ENEPIG under bump metallization via drop and high speed impact test. Microelectron. Reliab. 55 (1) (2015)
Meng-Chien Yang, D. Victoria Rau, Yi-Hsin Wu
Analyzing and Classifying the Yami Emotion Phrases Using Ontological Structure and Computation. IALP (2012)
Cheng-Juei Yu, Yi-Hsin Wu, Sheng-De Wang
An in-place search algorithm for the resource constrained scheduling problem during high-level synthesis. ACM Trans. Design Autom. Electr. Syst. 15 (4) (2010)
Yi-Hsin Wu, Cheng-Juei Yu, Sheng-De Wang
Heuristic algorithm for the resource constrained scheduling problem during high-level synthesis. IET Comput. Digit. Tech. 3 (1) (2009)