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Xuefan Jin
ORCID
Publication Activity (10 Years)
Years Active: 2012-2022
Publications (10 Years): 8
Top Topics
Heat Flow
Phase Locked Loop
Ultra Wideband
Database Interface
Top Venues
A-SSCC
IEEE J. Solid State Circuits
ISCAS
IEEE Trans. Very Large Scale Integr. Syst.
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Publications
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Dongsuk Kang
,
Jae-Woo Park
,
Injae Park
,
Minsu Park
,
Xuefan Jin
,
Kyu-Dong Hwang
,
Dae-Han Kwon
,
Jung-Hoon Chun
A 21-Gb/s Duobinary Transceiver for GDDR Interfaces With an Adaptive Equalizer.
IEEE J. Solid State Circuits
57 (10) (2022)
Jae-Woo Park
,
Dongsuk Kang
,
Injae Park
,
Minsu Park
,
Xuefan Jin
,
Kyu-Dong Hwang
,
Dae-Han Kwon
,
Jung-Hoon Chun
A 21Gb/s Duobinary Transceiver for GDDR interfaces with an Adaptive Equalizer.
A-SSCC
(2021)
Xuefan Jin
,
Woosung Park
,
Dong-Seok Kang
,
Youngjun Ko
,
Kee-Won Kwon
,
Jung-Hoon Chun
A 4-GHz Sub-Harmonically Injection-Locked Phase-Locked Loop With Self-Calibrated Injection Timing and Pulsewidth.
IEEE J. Solid State Circuits
55 (10) (2020)
Xuefan Jin
,
Dong-Seok Kang
,
Youngjun Ko
,
Kee-Won Kwon
,
Jung-Hoon Chun
A 4-GHz Sub-harmonically Injection-Locked Phase-Locked Loop with Self-Calibrated Injection Timing and Pulsewidth.
A-SSCC
(2019)
Ja-Hoon Jin
,
Xuefan Jin
,
Jaehong Jung
,
Kiwon Kwon
,
Jintae Kim
,
Jung-Hoon Chun
A 0.75-3.0-Gb/s Dual-Mode Temperature-Tolerant Referenceless CDR With a Deadzone-Compensated Frequency Detector.
IEEE J. Solid State Circuits
53 (10) (2018)
Sung-Ha Kim
,
Sang-Hoon Kim
,
Xuefan Jin
,
Yoonmyung Lee
,
Jung-Hoon Chun
A 21-Gb/s Dual-Channel Voltage-Mode Transmitter With Stacked NRZ and PAM4 Drivers.
IEEE Access
6 (2018)
Ja-Hoon Jin
,
Seok Kim
,
Xuefan Jin
,
Sang-Hoon Kim
,
Jung-Hoon Chun
A 12.5-Gb/s Near-Ground Transceiver Employing a MaxEye Algorithm-Based Adaptation Technique.
IEEE Trans. Very Large Scale Integr. Syst.
26 (3) (2018)
Ja-Hoon Jin
,
Xuefan Jin
,
Sang-Hoon Kim
,
Ik-Hwan Kim
,
Jaehong Jung
,
Kiwon Kwon
,
Jung-Hoon Chun
A 17.5-Gb/s transceiver with a MaxEye-based autonomous adaptation.
ISCAS
(2017)
Sung-Yong Kim
,
Xuefan Jin
,
Jung-Hoon Chun
,
Kee-Won Kwon
A digital DLL with 4-cycle lock time and 1/4 NAND-delay accuracy.
A-SSCC
(2015)
Seok Kim
,
Jung-Myung Kang
,
Xuefan Jin
,
Se-Ung Park
,
Ja-Hoon Jin
,
Kee-Won Kwon
,
Jung-Hoon Chun
,
Jung Ho Lee
,
Jun Young Park
,
Dae Young Lee
A 12.5-Gb/s near-GND transceiver for wire-line UHD video interfaces.
ISCAS
(2014)
Jae-Wook Kwon
,
Xuefan Jin
,
Gyoo-Cheol Hwang
,
Jung-Hoon Chun
,
Kee-Won Kwon
A 3.0 Gb/s clock data recovery circuits based on digital DLL for clock-embedded display interface.
ESSCIRC
(2012)