Xiaoji Ye

Publication Activity (10 Years)

Years Active: 2006-2011
Publications (10 Years): 0

Publications

Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
Hierarchical Multialgorithm Parallel Circuit Simulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (1) (2011)
Zhiyu Zeng, Xiaoji Ye, Zhuo Feng, Peng Li
Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation. DAC (2010)
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jiang Hu
Scalable Analysis of Mesh-Based Clock Distribution Networks Using Application-Specific Reduced Order Modeling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (9) (2010)
Xiaoji Ye, Peng Li
Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation. DAC (2010)
Xiaoji Ye, Peng Li, F. Y. Liu
Exact Time-Domain Second-Order Adjoint-Sensitivity Computation for Linear Circuit Analysis and Optimization. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2010)
Xiaoji Ye, Peng Li
On-the-fly runtime adaptation for efficient execution of parallel multi-algorithm circuit simulation. ICCAD (2010)
Venkata Rajesh Mekala, Yifang Liu, Xiaoji Ye, Jiang Hu, Peng Li
Accurate clock mesh sizing via sequential quadraticprogramming. ISPD (2010)
Xiaoji Ye, Srinath Narasimhan, Peng Li
Leveraging efficient parallel pattern search for clock mesh optimization. ICCAD (2009)
Xiaoji Ye, Peng Li
An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation. ISQED (2009)
Wei Dong, Peng Li, Xiaoji Ye
WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines. DAC (2008)
Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li, Jiang Hu
Accelerating Clock Mesh Simulation Using Matrix-Level Macromodels and Dynamic Time Step Rounding. ISQED (2008)
Xiaoji Ye, Wei Dong, Peng Li, Sani R. Nassif
MAPS: multi-algorithm parallel circuit simulation. ICCAD (2008)
Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda, Jiang Hu
Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding. ICCAD (2007)
Xiaoji Ye, Frank Liu, Peng Li
Fast Variational Interconnect Delay and Slew Computation Using Quadratic Models. IEEE Trans. Very Large Scale Integr. Syst. 15 (8) (2007)
Wei Dong, Peng Li, Xiaoji Ye
Efficient Frequency-Domain Simulation of Massive Clock Meshes Using Parallel Harmonic Balance. CICC (2007)
Xiaoji Ye, Yaping Zhan, Peng Li
Statistical Leakage Power Minimization Using Fast Equi-Slack Shell Based Optimization. DAC (2007)
Xiaoji Ye, Peng Li, Frank Liu
Practical variation-aware interconnect delay and slew analysis for statistical timing verification. ICCAD (2006)