Wolfgang Meyer

Publication Activity (10 Years)

Years Active: 1992-1998
Publications (10 Years): 0

University of Paderborn, Germany (PHD)

Education History

University of Paderborn, Germany

PHD

Publications

Andrew Seawright, Wolfgang Meyer
Partitioning and Optimizing Controllers Synthesized from Hierarchical High-Level Descriptions. DAC (1998)
Wolfgang Meyer, Andrew Seawright, Fumiya Tada
Design and Synthesis of Array Structured Telecommunication Processing Applications. DAC (1997)
Andrew Seawright, Joseph Buck, Ulrich Holtmann, Wolfgang Meyer, Barry M. Pangrle, Rob Verbrugghe
A system for compiling and debugging structured data processing controllers. EURO-DAC (1996)
Wolfgang Meyer, Raul Camposano
Active timing multilevel fault-simulation with switch-level accuracy. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 14 (10) (1995)
Wolfgang Meyer, Raul Camposano
Fast Hierarchical Multi-Level Fault Simulation of Sequential Circuits with Switch-Level Accuracy. DAC (1993)
Heinrich Theodor Vierhaus, Wolfgang Meyer, Uwe Gläser, Raul Camposano
Fault behavior and testability of asynchronous CMOS circuits. Microprocess. Microprogramming 38 (1-5) (1993)
Heinrich Theodor Vierhaus, Wolfgang Meyer, Uwe Gläser
versus Delay Effects. ITC (1993)
Uwe Hübner, Wolfgang Meyer, Heinrich Theodor Vierhaus
CMOS transistor faults and bridging faults: Testability by delay effects and overcurrents. Microprocess. Microprogramming 35 (1-5) (1992)