Wang Jiang Chau

Publication Activity (10 Years)

Years Active: 1998-2021
Publications (10 Years): 4

Top Topics

Hardware Implementation

Long Range Dependence

Tabu Search Algorithm

Dynamic Programming

Top Venues

Publications

Carolina Teng, Renan W. Achjian, Caio C. Braga, Marcelo Knörich Zuffo, Wang Jiang Chau
Accelerating the base-level alignment step of DNA assembling in Minimap2 Algorithm using FPGA. LASCAS (2021)
Guilherme Apolinario Silva Novaes, Luiz Carlos Moreira, Wang Jiang Chau
Exploring Tabu search based algorithms for mapping and placement in NoC-based reconfigurable systems. SBCCI (2019)
Guilherme Apolinario Silva Novaes, Luiz Carlos Moreira, Wang Jiang Chau
Mapping and Placement in NoC-based Reconfigurable Systems Using an Adaptive Tabu Search Algorithm. LASCAS (2019)
Jose Eduardo Chiarelli Bueno Filho, Wang Jiang Chau
On TLM traffic accuracy: A multifractal perspective. LASCAS (2018)
Johanna Sepúlveda, Guy Gogniat, Ricardo Pires, César Pedraza, Wang Jiang Chau, Marius Strum
QoS 3D-HoC hybrid-on-chip communication structure for dynamic 3D-MPSoCs. LASCAS (2013)
Jonas Gomes Filho, Marius Strum, Wang Jiang Chau
A strategy for mapping reconfigurable cores in NoCs. LASCAS (2013)
Jorge González, Gustavo Patino Alvarez, Marius Strum, Wang Jiang Chau
Long range dependence in intrachip transaction level traffic. LASCAS (2013)
Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau, Fabian Vargas
Formally verifying an RTOS scheduling monitor IP core in embedded systems. LATW (2011)
Carlos Ivan Castro Marquez, Marius Strum, Wang Jiang Chau
Automatic generation of a parameter-domain-based functional input coverage model. LATW (2010)
Wang Jiang Chau, Paulo Sérgio Cardoso, Marius Strum, Ricardo Pires
A Comparison Between Test Pattern Generation Strategies for Functional Units in BIST Applications. LATW (2002)
Wang Jiang Chau, Jose Artur Quilici González, Marius Strum, Ricardo Pires
BIST Plan Optimization and Independent Input Test Register Insertion for Datapath Functional Units. LATW (2002)
Duarte Lopes de Oliveira, Wagner Chiepa Cunha, Marius Strum, Wang Jiang Chau
Synthesis of Multi-Burst Controllers as Modified Huffman Machines. SBCCI (2001)
Jose Artur Quilici González, José Roberto de A. Amazonas, Marius Strum, Wang Jiang Chau
Self Test Built-in Plan for Data-Path Functional Units. LATW (2000)
Duarte Lopes de Oliveira, Marius Strum, Wang Jiang Chau, Wagner Chiepa Cunha
Synthesis of High Performance Extended Burst Mode Asynchronous State Machines. SBCCI (2000)
José Roberto de A. Amazonas, Marius Strum, Wang Jiang Chau
Exploring Concurrency in Data Path Functional Units BIST Plan Optimization: A Study-Case. SBCCI (1998)