Volkan Esen

Publication Activity (10 Years)

Years Active: 2004-2020
Publications (10 Years): 4

Top Venues

MLCAD

CODES+ISSS

VLSI-SoC

ASP-DAC

Technical University Munich, Germany (PHD)

Education History

Technical University Munich, Germany

PHD

Publications

Lorenzo Servadei, Jiapeng Zheng, Jose A. Arjona-Medina, Michael Werner, Volkan Esen, Sepp Hochreiter, Wolfgang Ecker, Robert Wille
Cost Optimization at Early Stages of Design Using Deep Reinforcement Learning. MLCAD (2020)
Vijay Deep Bhatt, Wolfgang Ecker, Volkan Esen, Zhao Han, Daniela Sanchez Lopera, Rituj Patel, Lorenzo Servadei, Sahil Singla, Sven Wenzek, Vijaydeep Yadav, Elena Zennaro
SoC Design Automation with ML - It's Time for Research. MLCAD (2020)
Alexander W. Rath, Sebastian Simon, Volkan Esen, Wolfgang Ecker
Automatically comparing analog behavior using Earth Mover's Distance. VLSI-SoC (2016)
Alexander W. Rath, Sebastian Simon, Volkan Esen, Wolfgang Ecker
Earth Mover's Distance as a Comparison Metric for Analog Behavior. VLSI-SoC (Selected Papers) (2016)
Alexander W. Rath, Volkan Esen, Wolfgang Ecker
A transaction-oriented UVM-based library for verification of analog behavior. ASP-DAC (2014)
Alexander W. Rath, Volkan Esen, Wolfgang Ecker
Comparison of analog transactions using statistics. ISSoC (2013)
Wolfgang Ecker, Volkan Esen, Michael Velten, Tudor Timisescu
SystemC as completing pillar in industrial OVM based verification environments. CODES+ISSS (2012)
Marcio F. da S. Oliveira, Christoph Kuznik, Hoang Minh Le, Daniel Große, Finn Haedicke, Wolfgang Müller, Rolf Drechsler, Wolfgang Ecker, Volkan Esen
The system verification methodology for advanced TLM verification. CODES+ISSS (2012)
Allan Crone, Oliver Bringmann, C. Chevallaz, B. Dickman, Volkan Esen, M. Rohleder
State of the art verification methodologies in 2015. DATE (2011)
Alexander W. Rath, Volkan Esen, Wolfgang Ecker
Analog transaction level modeling. HLDVT (2011)
Wolfgang Ecker, Volkan Esen, Rainer Findenig, Thomas Steininger, Michael Velten
Model reduction techniques for the formal verification of hardware dependent software. HLDVT (2010)
Wolfgang Ecker, Volkan Esen, Robert Schwencker, Thomas Steininger, Michael Velten
TLM+ modeling of embedded HW/SW systems. DATE (2010)
Wolfgang Ecker, Volkan Esen, Lars Schönberg, Thomas Steininger, Michael Velten, Michael Hull
Interactive presentation: Impact of description language, abstraction layer, and value representation on simulation performance. DATE (2007)
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten
Requirements and Concepts for Transaction Level Assertion Refinement. IESS (2007)
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull
Interactive presentation: Implementation of a transaction level assertion framework in SystemC. DATE (2007)
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Jacob Smit
IP Library For Temporal SystemC Assertions. FDL (2006)
Wolfgang Ecker, Volkan Esen, Michael Hull, Thomas Steininger, Michael Velten
Requirements and Concepts for Transaction Level Assertions. ICCD (2006)
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten
Case Study on Transaction Level Modeling. FDL (2006)
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten, Michael Hull
Specification Language for Transaction Level Assertions. HLDVT (2006)
Wolfgang Ecker, Volkan Esen, Michael Hull
Execution semantics and formalisms for multi-abstraction TLM assertions. MEMOCODE (2006)
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Martin Zambaldi
Memory Models for the Formal Verification of Assembler Code Using Bounded Model Checking. ISORC (2004)

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Publication Activity (10 Years)

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Volkan Esen