Vinay Vashishtha

Publication Activity (10 Years)

Years Active: 2015-2022
Publications (10 Years): 8

Top Topics

Design Processes

Top Venues

Microelectron. J.

Publications

Vinay Vashishtha, Lawrence T. Clark
ASAP5: A predictive PDK for the 5 nm node. Microelectron. J. 126 (2022)
Vinay Vashishtha, Lawrence T. Clark
Comparing bulk-Si FinFET and gate-all-around FETs for the 5 nm technology node. Microelectron. J. 107 (2021)
Vinay Vashishtha, Manoj Vangala, Lawrence T. Clark
ASAP7 predictive design kit development and cell design technology co-optimization: Invited paper. ICCAD (2017)
Vinay Vashishtha, Ankita Dosi, Lovish Masand, Lawrence T. Clark
Design technology co-optimization of back end of line design rules for a 7 nm predictive process design kit. ISQED (2017)
Vinay Vashishtha, Manoj Vangala, Parv Sharma, Lawrence T. Clark
Robust 7-nm SRAM design on a predictive PDK. ISCAS (2017)
Lawrence T. Clark, Vinay Vashishtha, David M. Harris, Samuel Dietrich, Zunyan Wang
Design flows and collateral for the ASAP7 7nm FinFET predictive process design kit. MSE (2017)
Lawrence T. Clark, Vinay Vashishtha
Design with sub-10 nm FinFET technologies. CICC (2017)
Lawrence T. Clark, Vinay Vashishtha, Lucian Shifren, Aditya Gujja, Saurabh Sinha, Brian Cline, Chandarasekaran Ramamurthy, Greg Yeric
ASAP7: A 7-nm finFET predictive process design kit. Microelectron. J. 53 (2016)
Vinay Vashishtha, Aditya Gujja, Lawrence T. Clark
Delay and power tradeoffs for static and dynamic register files. ISCAS (2015)
Vinay Vashishtha, Lawrence T. Clark, Srivatsan Chellappa, Anudeep R. Gogulamudi, Aditya Gujja, Chad Farnsworth
A soft-error hardened process portable embedded microprocessor. CICC (2015)
Srivatsan Chellappa, Chandarasekaran Ramamurthy, Vinay Vashishtha, Lawrence T. Clark
Advanced encryption system with dynamic pipeline reconfiguration for minimum energy operation. ISQED (2015)