Victor Lomné

Publication Activity (10 Years)

Years Active: 2008-2021
Publications (10 Years): 8

Top Topics

Scene Interpretation

Top Venues

IACR Cryptol. ePrint Arch.

Publications

Thomas Roche, Victor Lomné, Camille Mutschler, Laurent Imbert
A Side Journey To Titan. USENIX Security Symposium (2021)
Victor Lomné, Thomas Roche
A Side Journey to Titan. IACR Cryptol. ePrint Arch. 2021 (2021)
Thomas Roche, Laurent Imbert, Victor Lomné
Side-Channel Attacks on Blinded Scalar Multiplications Revisited. CARDIS (2019)
Thomas Roche, Laurent Imbert, Victor Lomné
Side-channel Attacks on Blinded Scalar Multiplications Revisited. IACR Cryptol. ePrint Arch. 2019 (2019)
Shivam Bhasin, Victor Lomné, Karim Tobich
An Industrial Outlook on Challenges of Hardware Security in Digital Economy - Extended Abstract -. SPACE (2017)
Christoph Dobraunig, Maria Eichlseder, Thomas Korak, Victor Lomné, Florian Mendel
Statistical Fault Attacks on Nonce-Based Authenticated Encryption Schemes. ASIACRYPT (1) (2016)
Florent Bruguier, Pascal Benoit, Lionel Torres, Lyonel Barthe, Morgan Bourree, Victor Lomné
Cost-Effective Design Strategies for Securing Embedded Processors. IEEE Trans. Emerg. Top. Comput. 4 (1) (2016)
Christoph Dobraunig, Maria Eichlseder, Thomas Korak, Victor Lomné, Florian Mendel
Practical Fault Attacks on Authenticated Encryption Modes for AES. IACR Cryptol. ePrint Arch. 2016 (2016)
Christophe Clavier, Jean-Luc Danger, Guillaume Duc, M. Abdelaziz Elaabid, Benoît Gérard, Sylvain Guilley, Annelie Heuser, Michael Kasper, Yang Li, Victor Lomné, Daisuke Nakatsu, Kazuo Ohta, Kazuo Sakiyama, Laurent Sauvage, Werner Schindler, Marc Stöttinger, Nicolas Veyrat-Charvillon, Matthieu Walle, Antoine Wurcker
Practical improvements of side-channel attacks on AES: feedback from the 2nd DPA contest. J. Cryptogr. Eng. 4 (4) (2014)
Victor Lomné, Emmanuel Prouff, Matthieu Rivain, Thomas Roche, Adrian Thillard
How to Estimate the Success Rate of Higher-Order Side-Channel Attacks. IACR Cryptol. ePrint Arch. 2014 (2014)
Aurélie Bauer, Éliane Jaulmes, Victor Lomné, Emmanuel Prouff, Thomas Roche
Side-Channel Attack against RSA Key Generation Algorithms. CHES (2014)
Victor Lomné, Emmanuel Prouff, Matthieu Rivain, Thomas Roche, Adrian Thillard
How to Estimate the Success Rate of Higher-Order Side-Channel Attacks. CHES (2014)
Ryad Benadjila, Jian Guo, Victor Lomné, Thomas Peyrin
Implementing Lightweight Block Ciphers on x86 Architectures. IACR Cryptol. ePrint Arch. 2013 (2013)
Victor Lomné, Emmanuel Prouff, Thomas Roche
Behind the Scene of Side Channel Attacks. ASIACRYPT (1) (2013)
Thomas Roche, Victor Lomné
Collision-Correlation Attack against Some 1st-Order Boolean Masking Schemes in the Context of Secure Devices. COSADE (2013)
Victor Lomné, Emmanuel Prouff, Thomas Roche
Behind the Scene of Side Channel Attacks. IACR Cryptol. ePrint Arch. 2013 (2013)
Ryad Benadjila, Jian Guo, Victor Lomné, Thomas Peyrin
Implementing Lightweight Block Ciphers on x86 Architectures. Selected Areas in Cryptography (2013)
Thomas Fuhr, Éliane Jaulmes, Victor Lomné, Adrian Thillard
Fault Attacks on AES with Faulty Ciphertexts Only. FDTC (2013)
Amine Dehbaoui, Victor Lomné, Thomas Ordas, Lionel Torres, Michel Robert, Philippe Maurine
Enhancing Electromagnetic Analysis Using Magnitude Squared Incoherence. IEEE Trans. Very Large Scale Integr. Syst. 20 (3) (2012)
Victor Lomné, Thomas Roche, Adrian Thillard
On the Need of Randomness in Fault Attack Countermeasures - Application to AES. FDTC (2012)
Thomas Roche, Victor Lomné, Karim Khalfallah
Combined Fault and Side-Channel Attack on Protected Implementations of AES. CARDIS (2011)
Sylvain Guilley, Karim Khalfallah, Victor Lomné, Jean-Luc Danger
Formal Framework for the Evaluation of Waveform Resynchronization Algorithms. WISTP (2011)
Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres, Michel Robert
Differential Power Analysis enhancement with statistical preprocessing. DATE (2010)
Victor Lomné, Philippe Maurine, Lionel Torres, Thomas Ordas, Mathieu Lisart, Jérome Toublanc
Modeling Time Domain Magnetic Emissions of ICs. PATMOS (2010)
Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Amine Dehbaoui, Philippe Maurine, Lionel Torres
A GALS pipeline DES architecture to increase robustness against DPA and DEMA attacks. SBCCI (2010)
Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
Evaluation on FPGA of triple rail logic robustness against DPA and DEMA. DATE (2009)
Amine Dehbaoui, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
Enhancing Electromagnetic Attacks Using Spectral Coherence Based Cartography. VLSI-SoC (2009)
Rafael Soares, Ney Laert Vilar Calazans, Victor Lomné, Philippe Maurine, Lionel Torres, Michel Robert
Evaluating the robustness of secure triple track logic through prototyping. SBCCI (2008)
Victor Lomné, Thomas Ordas, Philippe Maurine, Lionel Torres, Michel Robert, Rafael Soares, Ney Calazans
Triple Rail Logic Robustness against DPA. ReConFig (2008)