Valery Sklyarov

Publication Activity (10 Years)

Years Active: 1998-2017
Publications (10 Years): 11

Top Topics

Design Space Exploration

Computer Systems

Top Venues

Publications

Valery Sklyarov, Iouliia Skliarova
Data processing in the firmware systems for logic control based on search networks. Autom. Remote. Control. 78 (1) (2017)
Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
Reconfigurable systems in engineering education: Best practices and future trends. EDUCON (2017)
Artjem Rjabov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
RAM-based mergers for data sort and frequent item computation. MIPRO (2017)
Valery Sklyarov, Iouliia Skliarova, Artjem Rjabov, Alexander Sudnitson
Computing Sorted Subsets for Data Processing in Communicating Software/Hardware Control Systems. Int. J. Comput. Commun. Control 11 (1) (2016)
Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva
On-Chip Reconfigurable Hardware Accelerators for Popcount Computations. Int. J. Reconfigurable Comput. 2016 (2016)
Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, Alexander Sudnitson
Analysis and Comparison of Attainable Hardware Acceleration in All Programmable Systems-on-Chip. DSD (2015)
Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson, Margus Kruus
FPGA-based time and cost effective Hamming weight comparators for binary vectors. EUROCON (2015)
Valery Sklyarov, Iouliia Skliarova
Multi-core DSP-based Vector Set Bits Counters/Comparators. J. Signal Process. Syst. 80 (3) (2015)
Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
Integration of high-level synthesis to the courses on reconfigurable digital systems. MIPRO (2015)
Valery Sklyarov, Iouliia Skliarova
Design and implementation of counting networks. Computing 97 (6) (2015)
João Paulo Sá da Silva, Valery Sklyarov, Iouliia Skliarova
Comparison of On-chip Communications in Zynq-7000 All Programmable Systems-on-Chip. IEEE Embed. Syst. Lett. 7 (1) (2015)
Valery Sklyarov, Iouliia Skliarova
High-performance implementation of regular and easily scalable sorting networks on an FPGA. Microprocess. Microsystems 38 (5) (2014)
Valery Sklyarov, Iouliia Skliarova, João Paulo Sá da Silva, Alexander Sudnitson
Design space exploration in multi-level computing systems. CompSysTech (2014)
Iouliia Skliarova, Valery Sklyarov, Alexander Sudnitson, Margus Kruus
Teaching FPGA-based systems. EDUCON (2014)
Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
FPGA-based Accelerators for Parallel Data Sort. Appl. Comput. Syst. 16 (1) (2014)
Valery Sklyarov, Iouliia Skliarova, Artjem Rjabov, Alexander Sudnitson
Implementation of parallel operations over streams in extensible processing platforms. MWSCAS (2013)
Valery Sklyarov, Iouliia Skliarova, Margus Kruus, Dmitri Mihhailov, Alexander Sudnitson
Address-based data processing over N-ary trees. EUROCON (2013)
Valery Sklyarov, Iouliia Skliarova
Hardware implementations of software programs based on hierarchical finite state machine models. Comput. Electr. Eng. 39 (7) (2013)
Dmitri Mihhailov, Artjem Rjabov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
Optimization of address-based data sorting unit with external memory support. CompSysTech (2013)
Dmitri Mihhailov, Alexander Sudnitson, Valery Sklyarov, Iouliia Skliarova
Implementation of address-based data sorting on different FPGA platforms. EWDTS (2013)
Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
Performance evaluation for FPGA-based processing of tree-like structures. ICECS (2012)
Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
Methodology and international collaboration in teaching reconfigurable systems. EDUCON (2012)
Dmitri Mihhailov, Margus Kruus, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
Recursion and hierarchy in digital design and prototyping: a case study. CompSysTech (2011)
Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
Implementation in FPGA of Address-Based Data Sorting. FPL (2011)
Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
High-performance hardware accelerators for sorting and managing priorities. DDECS (2011)
Dmitri Mihhailov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
Application-specific hardware accelerator for implementing recursive sorting algorithms. FPT (2010)
Dmitri Mihhailov, Valery Sklyarov, Iouliia Skliarova, Alexander Sudnitson
Parallel FPGA-Based Implementation of Recursive Sorting Algorithms. ReConFig (2010)
Valery Sklyarov, Iouliia Skliarova, Dmitri Mihhailov, Alexander Sudnitson
Synthesis and Implementation of Hierarchical Finite State Machines with Implicit Modules. ReConFig (2010)
Iouliia Skliarova, Valery Sklyarov
Recursion in reconfigurable computing: A survey of implementation approaches. FPL (2009)
Iouliia Skliarova, Valery Sklyarov
Recursive versus Iterative Algorithms for Solving Combinatorial Search Problems in Hardware. VLSI Design (2008)
Valery Sklyarov, Iouliia Skliarova, Bruno Figueiredo Pimentel, Manuel Almeida
Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems. VLSI Design (2008)
Valery Sklyarov, Iouliia Skliarova, Manuel Almeida, Bruno Figueiredo Pimentel
A prototyping system for mobile devices. IWCMC (2007)
Iouliia Skliarova, Valery Sklyarov
Software/Configware Implementation of Combinatorial Algorithms. AICCSA (2007)
Valery Sklyarov, Iouliia Skliarova
Encoding Algorithms for Logic Synthesis. AICCSA (2007)
Valery Sklyarov, Iouliia Skliarova
Reuse Technique in Hardware Design. IRI (2007)
Valery Sklyarov, Iouliia Skliarova
Reconfigurable Systems and their Influence on Mobile and Multimedia Applications. MoMM (2006)
Valery Sklyarov, Iouliia Skliarova
Recursive and Iterative Algorithms for N-ary Search Problems. IFIP PPAI (2006)
Valery Sklyarov, Iouliia Skliarova
Evolutionary Algorithm for State Encoding. IFIP AI (2006)
Valery Sklyarov, Iouliia Skliarova
Multimedia Tools for Teaching Reconfigurable Systems. MoMM (2006)
Valery Sklyarov, Iouliia Skliarova
E-learning Tools and Web-resources for Teaching Reconfigurable Systems. Education for the 21st Century (2006)
Arnaldo S. R. Oliveira, Valery Sklyarov, António de Brito Ferrari
ARPA - A Technology Independent and Synthetizable System-on-Chip Model for Real-Time Applications. DSD (2005)
Valery Sklyarov, Iouliia Skliarova
Teaching reconfigurable systems: methods, tools, tutorials, and projects. IEEE Trans. Educ. 48 (2) (2005)
Valery Sklyarov, Iouliia Skliarova, Bruno Figueiredo Pimentel
FPGA-based implementation and comparison of recursive and iterative algorithms. FPL (2005)
Valery Sklyarov, Iouliia Skliarova, Bruno Figueiredo Pimentel, Joel Arrais
Hardware/Software Implementation of FPGA-Targeted Matrix-Oriented SAT Solvers. FPL (2004)
Valery Sklyarov
FPGA-based implementation of recursive algorithms. Microprocess. Microsystems 28 (5-6) (2004)
Valery Sklyarov, Iouliia Skliarova
Design of Digital Circuits on the Basis of Hardware Templates. Embedded Systems and Applications (2003)
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida, Manuel Almeida
High-Level Design Tools for FPGA-Based Combinatorial Accelerators. FPL (2003)
Valery Sklyarov, Iouliia Skliarova
Reconfigurable Systems in Education. FPL (2003)
Valery Sklyarov, Iouliia Skliarova, Arnaldo S. R. Oliveira, António de Brito Ferrari
A Dynamically Reconfigurable Accelerator for Operations over Boolean and Ternary Vectors. DSD (2003)
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida, Manuel Almeida
Design Tools and Reusable Libraries for FPGA-Based Digital Circuits. DSD (2003)
Valery Sklyarov, Iouliia Skliarova
Architecture of a Reconfigurable Processor for Implementing Search Algorithm over Discrete Matrices. Engineering of Reconfigurable Systems and Algorithms (2003)
Valery Sklyarov
Hardware/software modeling of FPGA-based systems. Parallel Algorithms Appl. 17 (1) (2002)
Valery Sklyarov
An Evolutionary Algorithm for the Synthesis of RAM-Based FSMs. IEA/AIE (2002)
Valery Sklyarov
Reconfigurable models of finite state machines and their implementation in FPGAs. J. Syst. Archit. 47 (14-15) (2002)
Arkadij Zakrevskij, Valery Sklyarov
The Specification and Design of Parallel Logical Control Devices. PDPTA (2000)
Valery Sklyarov
Synthesis and Implementation of RAM-Based Finite State Machines in FPGAs. FPL (2000)
Valery Sklyarov
Synthesis of Control Circuits with Dynamically Modifiable Behavior on the Basis of Statically Reconfigurable FPGAs. SBCCI (2000)
Nuno Lau, Valery Sklyarov
Dynamically Reconfigurable Implementation of Control Circuits. VLSI (1999)
Valery Sklyarov, J. Fonseca, Ricardo Sal Monteiro, Arnaldo S. R. Oliveira, Andreia Melo, Nuno Lau, Konstantin Kondratjuk, Iouliia Skliarova, Paulo A. C. S. Neves, António de Brito Ferrari
FPGA-Targeted Development System for Embedded Applications. FPGA (1999)
Valery Sklyarov, J. Fonseca, Ricardo Sal Monteiro, Arnaldo S. R. Oliveira, Andreia Melo, Nuno Lau, Iouliia Skliarova, Paulo A. C. S. Neves, António de Brito Ferrari
Development System for FPGA-Based Digital Circuits. FCCM (1999)
Valery Sklyarov
Graphical Description and Hardware Implementation of Parallel Control Algorithms. PDPTA (1999)
Arnaldo S. R. Oliveira, Andreia Melo, Valery Sklyarov
Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs. FPL (1999)
Valery Sklyarov
Hierarchical finite-state machines and their use for digital control. IEEE Trans. Very Large Scale Integr. Syst. 7 (2) (1999)
Arnaldo S. R. Oliveira, Valery Sklyarov
Implementation of virtual control circuits in dynamically reconfigurable FPGAs. ICECS (1999)
Valery Sklyarov
Logic Synthesis of Reconfigurable Control Circuits based on Mutually Exclusive Reprogrammable Elements. SBCCI (1998)
Valery Sklyarov, Ricardo Sal Monteiro, Nuno Lau, Andreia Melo, Arnaldo S. R. Oliveira, Konstantin Kondratjuk
Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs. FPL (1998)
Valery Sklyarov, Nuno Lau, Ricardo Sal Monteiro, Andreia Melo, Arnaldo S. R. Oliveira, Konstantin Kondratjuk
Design of Virtual Digital Controllers Based on Dynamically Reconfigurable FPGAs. EUROMICRO (1998)
Valery Sklyarov, António de Brito Ferrari
Design and implementation of control circuits based on dynamically reconfigurable FPGA. ICECS (1998)
Valery Sklyarov, Nuno Lau, Arnaldo S. R. Oliveira, Andreia Melo, Konstantin Kondratjuk, António de Brito Ferrari, Ricardo Sal Monteiro, Iouliia Skliarova
Synthesis Tools and Design Environment for Dynamically Reconfigurable FPGAs. SBCCI (1998)