High-performance implementation of regular and easily scalable sorting networks on an FPGA.
Valery SklyarovIouliia SkliarovaPublished in: Microprocess. Microsystems (2014)
Keyphrases
- hardware implementation
- hardware architecture
- highly scalable
- efficient implementation
- data intensive
- high speed
- software implementation
- highly parallel
- network analysis
- signal processor
- real time
- dedicated hardware
- data sets
- network structure
- hardware design
- single chip
- data acquisition
- quality of service
- cloud computing
- real time image processing
- signal processing
- media processing