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Vadthiya Narendar
Publication Activity (10 Years)
Years Active: 2021-2024
Publications (10 Years): 5
Top Topics
Low Power
Power Dissipation
Nm Technology
Design Procedure
Top Venues
Microelectron. J.
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Publications
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Santosh Kumar Padhi
,
Vadthiya Narendar
,
Atul Kumar Nishad
A novel step architecture based negative capacitance (SNC) FET: Design and circuit level analysis.
Microelectron. J.
146 (2024)
Ravi Kothapally
,
Vadthiya Narendar
,
Satish Maheshwaram
NDR free negative capacitance CGAAFET at 2nm technology node for low power and high-speed applications.
Microelectron. J.
142 (2023)
Kallepelli Sagar
,
Satish Maheshwaram
,
Vadthiya Narendar
Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes.
Microelectron. J.
142 (2023)
Santosh Kumar Padhi
,
Vadthiya Narendar
,
Atul Kumar Nishad
On the design of p-channel step-FinFET at sub-10nm node: A parametric analysis.
Microelectron. J.
126 (2022)
V. Bharath Sreenivasulu
,
Vadthiya Narendar
Characterization and optimization of junctionless gate-all-around vertically stacked nanowire FETs for sub-5 nm technology nodes.
Microelectron. J.
116 (2021)