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Performance analysis of geometric variations in circular double gate MOSFETs at sub-7nm technology nodes.
Kallepelli Sagar
Satish Maheshwaram
Vadthiya Narendar
Published in:
Microelectron. J. (2023)
Keyphrases
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nm technology
power consumption
low power
power dissipation
directed graph
geometric structure
shortest path
real time
high speed
geometric information
hough transform
network structure
graph structure
sensor networks
cmos technology
low voltage
image processing