Ulrich Nageldinger

Publication Activity (10 Years)

Years Active: 1996-2008
Publications (10 Years): 0

Publications

Jochen Zimmermann, Oliver Bringmann, Joachim Gerlach, Florian Schaefer, Ulrich Nageldinger
Comprehensive Platform and Component Modeling of Heterogeneous Interconnected Systems (invited). FDL (2008)
Andreas W. Liehr, Klaus J. Buchenrieder, Heike S. Rolfs, Ulrich Nageldinger
Generation of MARTE Allocation Models from Activity Threads. FDL (Selected Papers) (2008)
Andreas W. Liehr, Heike S. Rolfs, Klaus Buchenrieder, Ulrich Nageldinger
Generating MARTE Allocation Models from Activity Threads. FDL (2008)
Maik Boden, Alex Gleich, Steffen Rülke, Ulrich Nageldinger
A Low-Cost Realization of an Adaptable Protocol Processing Unit. IPDPS (2005)
Robert Fischer, Klaus Buchenrieder, Ulrich Nageldinger
Reducing the Power Consumption of FPGAs through Retiming. ECBS (2005)
Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier
System Prototyping by Integration of Reconfigurable Hardware into a Heterogeneous System Model. IEEE International Workshop on Rapid System Prototyping (2002)
Klaus Buchenrieder, Ulrich Nageldinger, Andreas Pyttel, Alexander Sedlmeier
Integration of Reconfigurable Hardware into System-Level Design. FPL (2002)
Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger
Synthesis and domain-specific optimization of KressArray-based reconfigurable computing engines (poster abstract). FPGA (2000)
Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger
Generation of Design Suggestions for Coarse-Grain Reconfigurable Architectures. FPL (2000)
Reiner W. Hartenstein, Thomas Hoffmann, Ulrich Nageldinger
Design-Space Exploration of Low Power Coarse Grained Reconfigurable Datapath Array Architectures. PATMOS (2000)
Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger
KressArray Xplorer: a new CAD environment to optimize reconfigurable datapath array. ASP-DAC (2000)
Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger
Mapping Applications onto Reconfigurable Kress Arrays. FPL (1999)
Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger, Thomas Hoffmann
An Internet Based Development Framework for Reconfigurable Computing. FPL (1999)
Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber
Interfacing the MoM-PDA to an Internet-based Development System. HICSS (1999)
Michael Herz, Thomas Hoffmann, Ulrich Nageldinger, Christian Schreiber
XMDS: The Xputer Multimedia Development System. HICSS (1999)
Jürgen Becker, Reiner W. Hartenstein, Michael Herz, Ulrich Nageldinger
Parallelization in Co-Compilation for Configurable Accelerators. ASP-DAC (1998)
Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger
On Reconfigurable Co-processing Units. IPPS/SPDP Workshops (1998)
Reiner W. Hartenstein, Michael Herz, Thomas Hoffmann, Ulrich Nageldinger
Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators. FPL (1998)
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger
Data scheduling to increase performance of parallel accelerators. FPL (1997)
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger
A Novel Sequencer Hardware for Application Specific Computing. ASAP (1997)
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Ulrich Nageldinger
A Novel Universal Sequencer Hardware. ARCS (1997)
Rainer Kress, Reiner W. Hartenstein, Ulrich Nageldinger
An operating system for custom computing machines based on the Xputer paradigm. FPL (1997)
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger
A Partitioning Programming Environment for a Novel Parallel Architecture. IPPS (1996)
Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger
A Synthesis System For Bus-Based Wavefront Array Architectures. ASAP (1996)