Tong Jing

Publication Activity (10 Years)

Years Active: 2002-2019
Publications (10 Years): 2

Top Topics

Structure Learning

Top Venues

Int. J. Wirel. Mob. Comput.

Publications

Tong Jing, Gaoming Huang, Wei Tian, Huafu Peng
Cramér-Rao Lower Bound Analysis for Stochastic Model Based Target Parameter Estimation in Multistatic Passive Radar With Direct-Path Interference. IEEE Access 7 (2019)
Yali Lv, Jian'ai Wu, Tong Jing
PQISEM: BN's structure learning based on partial qualitative influences and SEM algorithm from missing data. Int. J. Wirel. Mob. Comput. 14 (4) (2018)
Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Zhe Feng, Lei He, Xianlong Hong
Fashion: A Fast and Accurate Solution to Global Routing Problem. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (4) (2008)
Chunta Chu, Xinyi Zhang, Lei He, Tong Jing
Temperature aware microprocessor floorplanning considering application dependent power load. ICCAD (2007)
Zhen Cao, Tong Jing, Jinjun Xiong, Yu Hu, Lei He, Xianlong Hong
DpRouter: A Fast and Accurate Dynamic-Pattern-Based Global Routing Algorithm. ASP-DAC (2007)
Yu Hu, King Ho Tam, Tong Jing, Lei He
Fast dual-vdd buffering based on interconnect prediction and sampling. SLIP (2007)
Yu Hu, Tong Jing, Zhe Feng, Xianlong Hong, Xiaodong Hu, Guiying Yan
ACO-Steiner: Ant Colony Optimization Based Rectilinear Steiner Minimal Tree Algorithm. J. Comput. Sci. Technol. 21 (1) (2006)
Jingyu Xu, Xianlong Hong, Tong Jing, Yang Yang
Obstacle-avoiding rectilinear minimum-delay Steiner tree construction toward IP-block-based SOC design. IEEE Trans. Circuits Syst. II Express Briefs (4) (2006)
Zhen Cao, Tong Jing, Yu Hu, Yiyu Shi, Xianlong Hong, Xiaodong Hu, Guiying Yan
DraXRouter: global routing in X-Architecture with dynamic resource assignment. ASP-DAC (2006)
S. P. Shang, Xiaodong Hu, Tong Jing
Average lengths of wire routing under M-architecture and X-architecture. ISCAS (2006)
Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu
A coupling and crosstalk-considered timing-driven global routing algorithm for high-performance circuit design. Integr. 39 (4) (2006)
Zhe Feng, Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan
) algorithm for obstacle-avoiding routing tree construction in the lambda-geometry plane. ISPD (2006)
Yiyu Shi, Tong Jing, Lei He, Zhe Feng, Xianlong Hong
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model. ASP-DAC (2006)
Qi Zhu, Hai Zhou, Tong Jing, Xianlong Hong, Yang Yang
Spanning graph-based nonrectilinear steiner tree algorithms. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (7) (2005)
Yin Wang, Xianlong Hong, Tong Jing, Yang Yang, Xiaodong Hu, Guiying Yan
The polygonal contraction heuristic for rectilinear Steiner tree construction. ASP-DAC (2005)
Songpu Shang, Xiaodong Hu, Tong Jing
Rotational Steiner Ratio Problem Under Uniform Orientation Metrics. CJCDGCGT (2005)
Yang Yang, Tong Jing, Xianlong Hong, Yu Hu, Qi Zhu, Xiaodong Hu, Guiying Yan
Via-Aware Global Routing for Good VLSI Manufacturability and High Yield. ASAP (2005)
Jingyu Xu, Xianlong Hong, Tong Jing
Timing-driven global routing with efficient buffer insertion. ISCAS (3) (2005)
Yu Hu, Tong Jing, Xianlong Hong, Xiaodong Hu, Guiying Yan
A Routing Paradigm with Novel Resources Estimation and Routability Models for X-Architecture Based Physical Design. SAMOS (2005)
Jingyu Xu, Xianlong Hong, Tong Jing
Timing-Driven Global Routing with Efficient Buffer Insertion. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2005)
Tong Jing, Ling Zhang, Jinghong Liang, Jingyu Xu, Xianlong Hong, Jinjun Xiong, Lei He
A Min-area Solution to Performance and RLC Crosstalk Driven Global Routing Problem. ASP-DAC (2005)
Yu Hu, Tong Jing, Xianlong Hong, Zhe Feng, Xiaodong Hu, Guiying Yan
An-OARSMan: obstacle-avoiding routing tree construction with good length performance. ASP-DAC (2005)
Jingyu Xu, Xianlong Hong, Tong Jing, Yang Yang
Obstacle-Avoiding Rectilinear Minimum-Delay Steiner Tree Construction towards IP-Block-Based SOC Design. ISQED (2005)
Tong Jing, Xianlong Hong, Jingyu Xu, Haiyun Bao, Chung-Kuan Cheng, Jun Gu
UTACO: a unified timing and congestion optimization algorithm for standard cell global routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (3) (2004)
Qi Zhu, Hai Zhou, Tong Jing, Xianlong Hong, Yang Yang
Efficient octilinear Steiner tree construction based on spanning graphs. ASP-DAC (2004)
Yin Wang, Xianlong Hong, Tong Jing, Yang Yang, Xiaodong Hu, Guiying Yan
An Efficient Low-Degree RMST Algorithm for VLSI/ULSI Physical Design. PATMOS (2004)
Ling Zhang, Tong Jing, Xianlong Hong, Jingyu Xu, Jinjun Xiong, Lei He
Performance and RLC crosstalk driven global routing. ISCAS (5) (2004)
Jingyu Xu, Xianlong Hong, Tong Jing, Ling Zhang, Jun Gu
A coupling and crosstalk considered timing-driven global routing algorithm for high performance circuit design. ASP-DAC (2004)
Tong Jing, Xianlong Hong, Haiyun Bao, Jingyu Xu, Jun Gu
SSTT: Efficient Local Search for GSI Global Routing. J. Comput. Sci. Technol. 18 (5) (2003)
Xianlong Hong, Tong Jing, Jingyu Xu, Haiyun Bao, Jun Gu
CNB: A Critical-Network-Based Timing Optimization Method for Standard Cell Global Routing. J. Comput. Sci. Technol. 18 (6) (2003)
Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
A Novel Timing-Driven Global Routing Algorithm Considering Coupling Effects for High Performance Circuit Design. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2003)
Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
An efficient hierarchical timing-driven Steiner tree algorithm for global routing. Integr. 35 (2) (2003)
Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Chung-Kuan Cheng, Jun Gu
UTACO: a unified timing and congestion optimizing algorithm for standard cell global routing. ASP-DAC (2003)
Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
A novel timing-driven global routing algorithm considering coupling effects for high performance circuit design. ASP-DAC (2003)
Tong Jing, Xianlong Hong, Haiyun Bao, Yici Cai, Jingyu Xu, Jun Gu
A novel and efficient timing-driven global router for standard cell layout design based on critical network concept. ISCAS (1) (2002)
Jingyu Xu, Xianlong Hong, Tong Jing, Yici Cai, Jun Gu
An Efficient Hierarchical Timing-Driven Steiner Tree Algorithm for Global Routing. VLSI Design (2002)