Thucydides Xanthopoulos

Publication Activity (10 Years)

Years Active: 1994-2012
Publications (10 Years): 0

Top Venues

ISSCC

IEEE Trans. Very Large Scale Integr. Syst.

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

Dongwan Ha, Kyoungho Woo, Scott E. Meninger, Thucydides Xanthopoulos, Ethan Crain, Donhee Ham
Time-Domain CMOS Temperature Sensors With Dual Delay-Locked Loops for Microprocessor Thermal Monitoring. IEEE Trans. Very Large Scale Integr. Syst. 20 (9) (2012)
Brian Miller, Derek Brasili, Tim Kiszely, Rob Kuhn, Rahul Mehrotra, Manan Salvi, Mandar Kulkarni, Anand Varadharajan, Shi-Huang Yin, William Lin, Adam Hughes, Bill Stysiack, Vasu Kandadi, Ilan Pragaspathi, Dan Hartman, David Carlson, Vishnu Yalala, Thucydides Xanthopoulos, Scott E. Meninger, Ethan Crain, Mark Spaeth, Akin Aina, Suresh Balasubramanian, Joe Vulih, Pragati Tiwary, David Lin, Richard Kessler, Bruce Fishbein, Anil Jain
A 32-core RISC microprocessor with network accelerators, power management and testability features. ISSCC (2012)
Kyoungho Woo, Scott E. Meninger, Thucydides Xanthopoulos, Ethan Crain, Dongwan Ha, Donhee Ham
Dual-DLL-based CMOS all-digital temperature sensor for microprocessor thermal monitoring. ISSCC (2009)
Thucydides Xanthopoulos, Don Draper
Can Multicore Integration Justify the Increased Cost of Process Scalling? ISSCC (2008)
Thucydides Xanthopoulos, Atila Alvandpour
Clocking. ISSCC (2007)
Vishnu Yalala, Derek Brasili, David Carlson, Adam Hughes, Anil Jain, Tim Kiszely, Kolar Kodandapani, Anand Varadharajan, Thucydides Xanthopoulos
A 16-Core RISC Microprocessor with Network Extensions. ISSCC (2006)
Georgios K. Konstadinidis, Anantha P. Chandrakasan, Sreedhar Natarajan, Thucydides Xanthopoulos
Introduction to the Special Issue on the ISSCC2004. IEEE J. Solid State Circuits 40 (1) (2005)
Thucydides Xanthopoulos, Anantha P. Chandrakasan
A low-power DCT core using adaptive bitwidth and arithmetic activity exploiting signal correlations and quantization. IEEE J. Solid State Circuits 35 (5) (2000)
Rajeevan Amirtharajah, Thucydides Xanthopoulos, Anantha P. Chandrakasan
Power scalable processing using distributed arithmetic. ISLPED (1999)
Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan
A low power variable length decoder for MPEG-2 based on nonuniform fine-grain table partitioning. IEEE Trans. Very Large Scale Integr. Syst. 7 (2) (1999)
Thucydides Xanthopoulos, Anantha P. Chandrakasan
A low-power IDCT macrocell for MPEG-2 MP@ML exploiting data distribution properties for minimal activity. IEEE J. Solid State Circuits 34 (5) (1999)
Seong-Hwan Cho, Thucydides Xanthopoulos, Anantha P. Chandrakasan
An ultra low power variable length decoder for MPEG-2 exploiting codeword distribution. CICC (1998)
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha P. Chandrakasan
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT. DAC (1997)
Anantha P. Chandrakasan, Vadim Gutnik, Thucydides Xanthopoulos
Data driven signal processing: an approach for energy efficient computing. ISLPED (1996)
Larry R. Dennison, William J. Dally, Thucydides Xanthopoulos
Low-latency plesiochronous data retiming. ARVLSI (1995)
William J. Dally, Larry R. Dennison, David Money Harris, Kinhong Kan, Thucydides Xanthopoulos
The Reliable Router: A Reliable and High-Performance Communication Substrate for Parallel Computers. PCRCW (1994)
William J. Dally, Larry R. Dennison, David Money Harris, Kinhong Kan, Thucydides Xanthopoulos
Architecture and implementation of the reliable router. Hot Interconnects (1994)

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Publication Activity (10 Years)

Top Venues

Thucydides Xanthopoulos