Thomas Marconi

Publication Activity (10 Years)

Years Active: 2007-2017
Publications (10 Years): 2

Top Venues

VLSI-SoC

ICCD

Comput. Electr. Eng.

NANOARCH

Delft University of Technology, Netherlands (PHD)

Education History

Delft University of Technology, Netherlands

PHD

Publications

Mihai Lefter, George Razvan Voicu, Thomas Marconi, Valentin Savin, Sorin Dan Cotofana
LDPC-Based Adaptive Multi-Error Correction for 3D Memories. ICCD (2017)
Mihai Lefter, Thomas Marconi, George Razvan Voicu, Sorin Dan Cotofana
Low cost multi-error correction for 3D polyhedral memories. NANOARCH (2017)
Thomas Marconi, Sorin Cotofana
Dynamic Bitstream Length Scaling Energy Effective Stochastic LDPC Decoding. ACM Great Lakes Symposium on VLSI (2015)
Thomas Marconi
Online scheduling and placement of hardware tasks with multiple variants on dynamically reconfigurable field-programmable gate arrays. Comput. Electr. Eng. 40 (4) (2014)
Thomas Marconi, Christian Spagnol, Emanuel M. Popovici, Sorin Cotofana
Transmission Channel Noise Aware Energy Effective LDPC Decoding. VLSI-SoC (Selected Papers) (2014)
Thomas Marconi, Christian Spagnol, Emanuel M. Popovici, Sorin Cotofana
Towards energy effective LDPC decoding by exploiting channel noise variability. VLSI-SoC (2014)
Kaushik Triyambaka Mysur, Mihai Pricopi, Thomas Marconi, Tulika Mitra
Implementation of core coalition on FPGAs. VLSI-SoC (2013)
Liang Chen, Thomas Marconi, Tulika Mitra
Online scheduling for multi-core shared reconfigurable fabric. DATE (2012)
Thomas Marconi, Tulika Mitra
A novel online hardware task scheduling and placement algorithm for 3D partially reconfigurable FPGAs. FPT (2011)
Thomas Marconi, Jae Young Hur, Koen Bertels, Georgi Gaydadjiev
A novel configuration circuit architecture to speedup reconfiguration and relocation for partially reconfigurable devices. SASP (2010)
Yi Lu, Thomas Marconi, Koen Bertels, Georgi Gaydadjiev
A Communication Aware Online Task Scheduling Algorithm for FPGA-Based Partially Reconfigurable Systems. FCCM (2010)
Thomas Marconi, Dimitris Theodoropoulos, Koen Bertels, Georgi Gaydadjiev
A novel HDL coding style to reduce power consumption for reconfigurable devices. FPT (2010)
Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev
3D Compaction: A Novel Blocking-Aware Algorithm for Online Hardware Task Scheduling and Placement on 2D Partially Reconfigurable Devices. ARC (2010)
Zubair Nawaz, Thomas Marconi, Koen Bertels, Todor P. Stefanov
Flexible pipelining design for recursive variable expansion. IPDPS (2009)
Yi Lu, Thomas Marconi, Koen Bertels, Georgi Gaydadjiev
Online Task Scheduling for the FPGA-Based Partially Reconfigurable Systems. ARC (2009)
Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev
Intelligent Merging Online Task Placement Algorithm for Partial Reconfigurable Systems. DATE (2008)
Yi Lu, Thomas Marconi, Georgi Gaydadjiev, Koen Bertels
An efficient algorithm for free resources management on the FPGA. DATE (2008)
Thomas Marconi, Yi Lu, Koen Bertels, Georgi Gaydadjiev
Online Hardware Task Scheduling and Placement Algorithm on Partially Reconfigurable Devices. ARC (2008)
Yi Lu, Thomas Marconi, Georgi Gaydadjiev, Koen Bertels, Roel Meeuws
A self-adaptive on-line task placement algorithm for partially reconfigurable systems. IPDPS (2008)
Zubair Nawaz, Ozana Silvia Dragomir, Thomas Marconi, Elena Moscu Panainte, Koen Bertels, Stamatis Vassiliadis
Recursive Variable Expansion: A Loop Transformation for Reconfigurable Systems. FPT (2007)

Thomas Marconi.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Top Topics

Top Venues

Thomas Marconi