Stanislaw Deniziak

Publication Activity (10 Years)

Years Active: 1994-2024
Publications (10 Years): 28

Top Topics

Embedded Systems

Scalable Distributed

Image Retrieval

Functional Decomposition

Top Venues

Publications

Pawel Pieta, Hubert Jegierski, Pawel Babiuch, Maciej Jegierski, Miroslaw Plaza, Grzegorz Lukawski, Stanislaw Deniziak, Artur Jasinski, Jacek Opalka, Pawel Wegrzyn, Magdalena Igras-Cybulska, Adrian Lapczynski
Automated Classification of Virtual Reality User Motions Using a Motion Atlas and Machine Learning Approach. IEEE Access 12 (2024)
Miroslaw Plaza, Marcin Kozlowski, Michal Lucki, Radoslaw Belka, Stanislaw Deniziak, Jiri Vodrazka
RTLS Systems Designing Approach Using Beacon Technology. IEEE Internet Things J. 11 (8) (2024)
Pawel Babiuch, Adrian Lapczynski, Hubert Jegierski, Maciej Jegierski, Rafal Salamon, Barbara Kolber-Bugajska, Mirosaw Paza, Stanislaw Deniziak, Pawel Pieta, Grzegorz Lukawski, Artur Jasinski, Jacek Opalka, Alicia Marmon, Kamil Kwiatkowski, Artur Cybulski, Magdalena Igras-Cybulska, Pawel Wegrzyn
MUN: an AI-powered multiplayer networking solution for VR games. VR Workshops (2024)
Magdalena Igras-Cybulska, Barbara Kolber-Bugajska, Rafal Salamon, Pawel Babiuch, Hubert Jegierski, Maciej Jegierski, Adrian Lapczynski, Alicja Marmon, Kamil Kwiatkowski, Artur Cybulski, Miroslaw Plaza, Grzegorz Lukawski, Stanislaw Deniziak, Pawel Pieta, Artur Jasinski, Jacek Opalka, Pawel Wegrzyn
Supporting Unity Developers with an AI-Powered Asset: Insights from an Exploratory User Study on Multiplayer Game Development Magdalena Igras-Cybulska. SYNERGY@AVI (2024)
Stanislaw Deniziak, Miroslaw Plaza, Lukasz Arcab
Real-time Communication Model for IoT Systems. FedCSIS (2023)
Lukasz Pawlik, Miroslaw Plaza, Stanislaw Deniziak, Ewa Boksa
A method for improving bot effectiveness by recognising implicit customer intent in contact centre conversations. Speech Commun. 143 (2022)
Adam Krechowicz, Stanislaw Deniziak, Grzegorz Lukawski
Highly Scalable Distributed Architecture for NoSQL Datastore Supporting Strong Consistency. IEEE Access 9 (2021)
Stanislaw Deniziak, Mariusz Wisniewski
DECOLib: A library of components for DECOmposition of discrete functions. SoftwareX 16 (2021)
Miroslaw Plaza, Lukasz Pawlik, Stanislaw Deniziak
Call Transcription Methodology for Contact Center Systems. IEEE Access 9 (2021)
Stanislaw Deniziak, Slawomir Bak
Scheduling of Distributed Applications in HHPCaaS Clouds for Internet of Things. DDECS (2020)
Stanislaw Deniziak, Leszek Ciopinski
Synthesis of Self-Adaptable Software for Multicore Embedded Systems. DDECS (2020)
Stanislaw Deniziak, Robert Tomaszewski
Co-synthesis of contention-free energy-efficient NOC-based real time embedded systems. J. Syst. Archit. 98 (2019)
Adam Krechowicz, Stanislaw Deniziak
Hierarchical Clustering in Scalable Distributed Two-Layer Datastore for Big Data as a Service. ES (2018)
Stanislaw Deniziak, Tomasz Michno
Query by Approximate Shapes Image Retrieval with improved object sketch extraction algorithm. FedCSIS (2018)
Stanislaw Deniziak, Robert Tomaszewski
Codesign of energy and resource efficient contention-free Network-on Chip for real-time embedded systems. NoCArc@MICRO (2018)
Mariusz Wisniewski, Stanislaw Deniziak
BMB synthesis of binary functions using symbolic functional decomposition for LUT-based FPGAs. J. Parallel Distributed Comput. 120 (2018)
Stanislaw Deniziak, Tomasz Michno
New Content Based Image Retrieval database structure using Query by Approximate Shapes. FedCSIS (2017)
Adam Krechowicz, Stanislaw Deniziak
Business Intelligence Platform for Big Data based on Scalable Distributed Two-Layer Data Store. FedCSIS (Communication Papers) (2017)
Stanislaw Deniziak, Tomasz Michno, Adam Krechowicz
Content Based Image Retrieval Using Modified Scalable Distributed Two-Layer Data Structure. Int. J. Comput. Sci. Appl. 13 (2) (2016)
Stanislaw Deniziak, Mariusz Wisniewski, Karol Wieczorek
Synthesis of Multivalued Logical Networks for FPGA Implementations. DSD (2016)
Stanislaw Deniziak, Tomasz Michno
Content Based Image Retrieval using Query by Approximate Shape. FedCSIS (2016)
Stanislaw Deniziak, Tomasz Michno
Query-by-Shape interface for Content Based Image Retrieval. HSI (2015)
Adam Krechowicz, Stanislaw Deniziak, Mariusz Bedla, Arkadiusz Chrobot, Grzegorz Lukawski
Scalable Distributed Two-Layer Block Based Datastore. PPAM (1) (2015)
Stanislaw Deniziak, Leszek Ciopinski
Synthesis of power aware adaptive schedulers for embedded systems using developmental genetic programming. FedCSIS (2015)
Adam Krechowicz, Stanislaw Deniziak, Grzegorz Lukawski, Mariusz Bedla
Preserving Data Consistency in Scalable Distributed Two Layer Data Structures. BDAS (2015)
Stanislaw Deniziak, Mariusz Wisniewski
Symbolic Functional Decomposition of Multivalued Functions. J. Multiple Valued Log. Soft Comput. 24 (5-6) (2015)
Stanislaw Deniziak, Tomasz Michno
Query by Shape for Image Retrieval from Multimedia Databases. BDAS (2015)
Stanislaw Deniziak, Tomasz Michno, Adam Krechowicz
The scalable distributed two-layer Content Based Image Retrieval data store. FedCSIS (2015)
Krzysztof Sapiecha, Leszek Ciopinski, Stanislaw Deniziak
An Application of Developmental Genetic Programming for Automatic Creation of Supervisors of Multi-task Real-Time Object-Oriented Systems. FedCSIS (2014)
Stanislaw Deniziak, Leszek Ciopinski, Grzegorz Pawinski, Karol Wieczorek, Slawomir Bak
Cost Optimization of Real-Time Cloud Applications Using Developmental Genetic Programming. UCC (2014)
Slawomir Bak, Stanislaw Deniziak
Synthesis of Real Time Distributed Applications for Cloud Computing. FedCSIS (2014)
Slawomir Bak, Radoslaw Czarnecki, Stanislaw Deniziak
Synthesis of Real-Time Applications for Internet of Things. ICPCA/SWS (2012)
Stanislaw Deniziak, Konrad Kurczyna
Aspect-oriented SystemC-based performance evaluation of real-time embedded software. PDeS (2012)
Stanislaw Deniziak, Karol Wieczorek
Evolutionary Optimization of Decomposition Strategies for Logical Functions. ICAISC (SIDE-EC) (2012)
Stanislaw Deniziak, Karol Wieczorek
Parallel Approach to the Functional Decomposition of Logical Functions Using Developmental Genetic Programming. PPAM (1) (2011)
Robert Tomaszewski, Stanislaw Deniziak
Contention-free and application-specific network-on-chip generation for embedded systems. PDeS (2010)
Stanislaw Deniziak, Robert Tomaszewski
Contention-avoiding custom topology generation for network-on-chip. DDECS (2009)
Stanislaw Deniziak, Mariusz Wisniewski
A symbolic RTL synthesis for LUT-based FPGAs. DDECS (2009)
Stanislaw Deniziak, Mariusz Wisniewski
An symbolic decomposition of functions with multi-valued inputs and outputs for FPGA-based implementation. FPL (2008)
Stanislaw Deniziak, Robert Tomaszewski
Rapid Prototyping of NoC Architectures from a SystemC Specification. DDECS (2008)
Stanislaw Deniziak, Adam Gorski
Hardware/Software Co-synthesis of Distributed Embedded Systems Using Genetic Programming. ICES (2008)
Stanislaw Deniziak, Mariusz Wisniewski
An Integrated Input Encoding and Symbolic Functional Decomposition for LUT-Based FPGAs. DDECS (2008)
Radoslaw Czarnecki, Stanislaw Deniziak
Resource Constrained Co-synthesis of Self-reconfigurable SOPCs. DDECS (2007)
Stanislaw Deniziak, Krzysztof Sapiecha
RT-level fast fault simulator. Ann. UMCS Informatica 2 (1) (2004)
Joanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha
Validation of Reactive Embedded Systems against Temporal Requirements. ECBS (2004)
Stanislaw Deniziak, Krzysztof Sapiecha
Fast high-level fault simulator. ICECS (2004)
Joanna Strug, Stanislaw Deniziak, Krzysztof Sapiecha
Validation of reactive embedded systems against specification requirements. Ann. UMCS Informatica 2 (1) (2004)
Radoslaw Czarnecki, Stanislaw Deniziak, Krzysztof Sapiecha
An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs. DSD (2003)
Stanislaw Deniziak, Krzysztof Sapiecha
Developing a High-Level Fault Simulation Standard. Computer 34 (5) (2001)
Stanislaw Deniziak, Krzysztof Sapiecha
High Level Testbench Generation for VHDL Models. ECBS (1999)
Joanna Sapiecha, Krzysztof Sapiecha, Stanislaw Deniziak
HTDD based parallel fault simulator. ICECS (1998)
Stanislaw Deniziak, Krzysztof Sapiecha
Cupland - A Behavioral Level Description Compiler for Designing of PLD/EPLD-Based Systems. ISCAS (1994)