An Iterative Improvement Co-synthesis Algorithm for Optimization of SOPC Architecture with Dynamically Reconfigurable FPGAs.
Radoslaw CzarneckiStanislaw DeniziakKrzysztof SapiechaPublished in: DSD (2003)
Keyphrases
- optimization algorithm
- detection algorithm
- hardware implementation
- learning algorithm
- improved algorithm
- optimization model
- cost function
- optimal solution
- dynamic programming
- experimental evaluation
- times faster
- software implementation
- computational cost
- computational complexity
- search space
- preprocessing
- iterative optimization
- np hard
- worst case
- k means
- neural network
- stochastic gradient
- combinatorial optimization
- similarity measure
- signal processing
- hardware design
- image processing algorithms
- constrained optimization
- convergence rate
- segmentation algorithm
- expectation maximization
- low cost
- objective function
- genetic algorithm