Shu-Shin Chin

Publication Activity (10 Years)

Years Active: 2002-2006
Publications (10 Years): 0

Publications

Sangjin Hong, Shu-Shin Chin, Petar M. Djuric, Miodrag Bolic
Design and Implementation of Flexible Resampling Mechanism for High-Speed Parallel Particle Filters. J. VLSI Signal Process. 44 (1-2) (2006)
Sangjin Hong, Shu-Shin Chin
Domain Specific Reconfigurable Processing Core Architecture for Digital Filtering Applications. J. VLSI Signal Process. 40 (2) (2005)
Sangjin Hong, Shu-Shin Chin
Extensible supply voltage control mechanism for low power array structure design. IEEE Trans. Circuits Syst. II Express Briefs (11) (2005)
Shu-Shin Chin, Sangjin Hong, Suhwan Kim
Usage of Application-Specific Switching Activity for Energy Minimization of Arithmetic Units. ISVLSI (2004)
Sangjin Hong, Shu-Shin Chin
Incorporating Power Reduction Mechanism in Arithmetic Core Design. ISVLSI (2004)
Sangjin Hong, Shu-Shin Chin, Magesh Sadasivam
Glitching power reduction through supply voltage adaptation mechanism for low power array structure design. ISCAS (2) (2004)
Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang
Power Reduction Technique in Coefficient Multiplications Through Multiplier Characterization. J. VLSI Signal Process. 38 (2) (2004)
Sangjin Hong, Shu-Shin Chin, Suhwan Kim, Wei Hwang
Multiplier architecture power consumption characterization for low-power DSP applications. ICECS (2002)