Multiplier architecture power consumption characterization for low-power DSP applications.
Sangjin HongShu-Shin ChinSuhwan KimWei HwangPublished in: ICECS (2002)
Keyphrases
- low power
- power consumption
- digital signal processing
- vlsi architecture
- power management
- high speed
- cmos technology
- low power consumption
- nm technology
- single chip
- energy efficiency
- mixed signal
- power saving
- power reduction
- hardware implementation
- data center
- signal processing
- low cost
- real time
- multi hop wireless networks
- energy saving
- data flow
- efficient implementation