Shorin Kyo

Publication Activity (10 Years)

Years Active: 2001-2013
Publications (10 Years): 0

Top Topics

Embedded Processors

Belief Propagation

Message Passing

Top Venues

Publications

Ben Kelly, William B. Gardner, Shorin Kyo
AutoPilot: message passing parallel programming for a cache incoherent embedded manycore processor. MES (2013)
Hanno Lieske, Shorin Kyo, Shouhei Nomoto, Sunao Torii, Yuki Kobayashi, Yasuyuki Ninomiya, Shin'ichiro Okazaki
Efficient data transfer operations for a SIMD processor array system. ICASSP (2012)
Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki
A dynamic SIMD/MIMD mode switching processor for embedded real-time image recognition systems. A-SSCC (2011)
Shorin Kyo, Shin'ichiro Okazaki
IMAPCAR: A 100 GOPS In-Vehicle Vision Processor Based on 128 Ring Connected Four-Way VLIW Processing Elements. J. Signal Process. Syst. 62 (1) (2011)
Shao-Yi Chien, Shorin Kyo, Tsung-Han Tsai
Guest Editorial: Special Issue on Computing Architectures for Real-Time Video/Image Analysis. J. Signal Process. Syst. 62 (1) (2011)
Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki
Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application. IPSJ Trans. Syst. LSI Des. Methodol. 3 (2010)
Shorin Kyo, Shouhei Nomoto, Takuya Koga, Hanno Lieske, Shin'ichiro Okazaki
IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems. Hot Chips Symposium (2009)
Shorin Kyo, Shouhei Nomoto, Shin'ichiro Okazaki
Mapping schemes of image recognition tasks onto highly parallel SIMD/MIMD processors. ICDSC (2009)
Shorin Kyo, Shin'ichiro Okazaki
In-vehicle vision processors for driver assistance systems. ASP-DAC (2008)
Kazuyuki Sakurai, Shorin Kyo, Shin'ichiro Okazaki
Overtaking Vehicle Detection Method and Its Implementation Using IMAPCAR Highly Parallel Image Processor. IEICE Trans. Inf. Syst. (7) (2008)
Ichiro Kuroda, Shorin Kyo
Media Processing LSI Architectures for Automotives - Challenges and Future Trends - . IEICE Trans. Electron. (10) (2007)
Shorin Kyo, Takuya Koga, Hanno Lieske, Shouhei Nomoto, Shin'ichiro Okazaki
A low-cost mixed-mode parallel processor architecture for embedded systems. ICS (2007)
Kazuyuki Sakurai, Shorin Kyo, Shin'ichiro Okazaki
Overtaking Vehicle Detection Method and Its Implementation Using IMAPCAR Highly Parallel Image Processor. MVA (2007)
Shorin Kyo, Shin'ichiro Okazaki, Tamio Arai
An Integrated Memory Array Processor for Embedded Image Recognition Systems. IEEE Trans. Computers 56 (5) (2007)
Shorin Kyo, Shin'ichiro Okazaki, Tamio Arai
An Integrated Memory Array Processor Architecture for Embedded Image Recognition Systems. ISCA (2005)
Shorin Kyo, Takuya Koga, Shin'ichiro Okazaki, Ichiro Kuroda
A 51.2 GOPS Programmable Video Recognition Processor for Vision-Based Intelligent Cruise Control Applications. IEICE Trans. Inf. Syst. (1) (2004)
Shorin Kyo, Takuya Koga, Shin'ichiro Okazaki, Ichiro Kuroda
A 51.2-GOPS scalable video recognition processor for intelligent cruise control based on a linear array of 128 four-way VLIW processing elements. IEEE J. Solid State Circuits 38 (11) (2003)
Shorin Kyo
A 51.2GOPS Programmable Video Recognition Processor for Vision Based Intelligent Cruise Control Applications. MVA (2002)
Shorin Kyo, Takuya Koga, Shin'ichiro Okazaki
IMAP-CE: a 51.2 GOPS video rate image processor with 128 VLIW processing elements. ICIP (3) (2001)