A low-cost mixed-mode parallel processor architecture for embedded systems.

Shorin Kyo Takuya Koga Hanno Lieske Shouhei Nomoto Shin'ichiro Okazaki

Published in: ICS (2007)

Keyphrases

embedded systems
low cost
mixed mode
parallel processors
hardware software
real time
processing elements
field programmable gate array
search problems
real time systems
protocol stack
code generation
distributed systems
scheduling problem
precedence constraints
software architecture
lower bound