Shigeru Atsumi

Publication Activity (10 Years)

Years Active: 1994-2002
Publications (10 Years): 0

Publications

Toru Tanzawa, Yoshinori Takano, Kentaro Watanabe, Shigeru Atsumi
High-voltage transistor scaling circuit techniques for high-density negative-gate channel-erasing NOR flash memories. IEEE J. Solid State Circuits 37 (10) (2002)
Toru Tanzawa, Akira Umezawa, Tadayuki Taura, Hitoshi Shiga, Tokumasa Hara, Yoshinori Takano, Takeshi Miyaba, Naoya Tokiwa, Kentaro Watanabe, Hiroshi Watanabe, Kazunori Masuda, Kiyomi Naruke, Hideo Kato, Shigeru Atsumi
four-bank eight-word page-read 64-Mb flash memory with flexible block redundancy and fast accurate word-line voltage controller. IEEE J. Solid State Circuits 37 (11) (2002)
Toru Tanzawa, Akira Umezawa, Masao Kuriyama, Tadayuki Taura, Hironori Banba, Takeshi Miyaba, Hitoshi Shiga, Yoshinori Takano, Shigeru Atsumi
Wordline voltage generating system for low-power low-voltage flash memories. IEEE J. Solid State Circuits 36 (1) (2001)
Toru Tanzawa, Yoshinori Takano, Tadayuki Taura, Shigeru Atsumi
Design of a sense circuit for low-voltage flash memories. IEEE J. Solid State Circuits 35 (10) (2000)
Shigeru Atsumi, Akira Umezawa, Tooru Tanzawa, Tadayuki Taura, Hitoshi Shiga, Yoshinori Takano, Takeshi Miyaba, Michiharu Matsui, Hiroshi Watanabe, Kazuaki Isobe, Shota Kitamura, Seiji Yamada, Masanobu Saito, Seiichi Mori, Toshiharu Watanabe
A channel-erasing 1.8-V-only 32-Mb NOR flash EEPROM with a bitline direct sensing scheme. IEEE J. Solid State Circuits 35 (11) (2000)
Hironori Banba, Hitoshi Shiga, Akira Umezawa, Takeshi Miyaba, Toru Tanzawa, Shigeru Atsumi, Koji Sakui
A CMOS bandgap reference circuit with sub-1-V operation. IEEE J. Solid State Circuits 34 (5) (1999)
Toru Tanzawa, Shigeru Atsumi
Optimization of word-line booster circuits for low-voltage flash memories. IEEE J. Solid State Circuits 34 (8) (1999)
Shigeru Atsumi, Masao Kuriyama, Akira Umezawa, Hironori Banba, Kiyomi Naruke, Seiji Yamada, Yoichi Ohshima, Masamitsu Oshikiri, Yohei Hiura, Tomoko Yamane, Kuniyoshi Yoshikawa
A 16-Mb flash EEPROM with a new self-data-refresh scheme for a sector erase operation. IEEE J. Solid State Circuits 29 (4) (1994)