Sharvani Gadgil

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 5

Top Topics

Low Power Consumption

Cmos Technology

Top Venues

Microelectron. J.

Circuits Syst. Signal Process.

Publications

Sharvani Gadgil, Goli Naga Sandesh, Chetan Vudadha
Design of a Ternary Logic Processor Using CNTFET Technology. Circuits Syst. Signal Process. 43 (9) (2024)
Sharvani Gadgil, Goli Naga Sandesh, Chetan Vudadha
Power efficient designs of CNTFET-based ternary SRAM. Microelectron. J. 139 (2023)
Siddharth T, Sharvani Gadgil, Chetan Vudadha
Design of CNTFET-based Ternary Logic circuits using Low power Encoder. iSES (2022)
Harita Sirugudi, Sharvani Gadgil, Chetan Vudadha
A Novel Low Power Ternary Multiplier Design using CNFETs. VLSI Design (2020)
Poojan Patel, Nikita Doddapaneni, Sharvani Gadgil, Chetan Vudadha
Design of Area Optimised, Energy Efficient Quaternary Circuits Using CNTFETs. iSES (2019)