Design of CNTFET-based Ternary Logic circuits using Low power Encoder.

Siddharth T Sharvani Gadgil Chetan Vudadha

Published in: iSES (2022)

Keyphrases

logic circuits
low power
power consumption
gate array
high speed
single chip
low cost
power reduction
functional decomposition
low power consumption
power dissipation
digital signal processing
logic synthesis
vlsi architecture
tunnel diode
cmos technology
mixed signal
signal processing
image processing