Serge Weber

Publication Activity (10 Years)

Years Active: 1996-2023
Publications (10 Years): 9

Top Topics

Reconfigurable Architecture

Fault Detection

Vector Quantization

Top Venues

Microprocess. Microsystems

IEEE Embed. Syst. Lett.

Publications

Alexis Chabert, Mohamed Chafik Bakkay, Patrick Schweitzer, Serge Weber, Jonathan Andrea
A Transformer Neural Network For AC series arc-fault detection. Eng. Appl. Artif. Intell. 125 (2023)
Alexis Chabert, Patrick Schweitzer, Serge Weber, Jonathan Andrea
State-Space Simulation of Electric Arc Faults. IEEE Trans. Aerosp. Electron. Syst. 58 (3) (2022)
Slavisa Jovanovic, Hassan Rabah, Serge Weber, Khaled Ben Khalifa, Mohamed Hédi Bedoui
Scalable, dynamic and growing hardware self-organizing architecture for real-time vector quantization. ICECS (2020)
Hien Duc Vu, Edwin Calderon, Patrick Schweitzer, Serge Weber, Nicolas Britsch
AC series arc fault detection with stacked autoencoders. IECON (2019)
Mehdi Abadi, Slavisa Jovanovic, Khaled Ben Khalifa, Serge Weber, Mohamed Hédi Bedoui
A Multi-Application, Scalable and Adaptable Hardware SOM Architecture. IJCNN (2019)
Slavisa Jovanovic, Hassan Rabah, Serge Weber
High performance scalable hardware SOM architecture for real-time vector quantization. IPAS (2018)
Mehdi Abadi, Slavisa Jovanovic, Khaled Ben Khalifa, Serge Weber, Mohamed Hédi Bedoui
A scalable and adaptable hardware NoC-based self organizing map. Microprocess. Microsystems 57 (2018)
Mehdi Abadi, Slavisa Jovanovic, Khaled Ben Khalifa, Serge Weber, Mohamed Hédi Bedoui
A Scalable Flexible SOM NoC-Based Hardware Architecture. WSOM (2016)
Mehdi Abadi, Slavisa Jovanovic, Khaled Ben Khalifa, Serge Weber, Mohamed Hedi Bedoui
A hardware configurable self-organizing map for real-time color quantization. ICECS (2016)
Nicolas Marques, Hassan Rabah, Eric Dabellani, Serge Weber
A Novel Framework for the Design of Adaptable Reconfigurable Partitions for the Placement of Variable-sized IP Cores. IEEE Embed. Syst. Lett. 6 (3) (2014)
Eric Dabellani, Hassan Rabah, Nicolas Marques, Yves Berviller, Slavisa Jovanovic, Serge Weber
Modeling and FPGA implementation of reconfigurable transcoder for real time video adaptation. ICECS (2013)
François Duhem, Nicolas Marques, Fabrice Muller, Hassan Rabah, Serge Weber, Philippe Lorenzini
Dynamically reconfigurable entropy coder for multi-standard video adaptation using FaRM. Microprocess. Microsystems 37 (1) (2013)
Nicolas Marques, Hassan Rabah, Slavisa Jovanovic, Eric Dabellani, Serge Weber
Methodology and reconfigurable architecture for effective placement of variable-size hardware tasks. AHS (2013)
Eber Espino Garibay, Domingo Torres, Serge Weber
An approach: FPGA based dynamically reconfigurable architecture to enable several scheme controls for power converters. CCE (2012)
Michael Guarisco, Eric Dabellani, Nicolas Marques, Hassan Rabah, Yves Berviller, Serge Weber
An efficient VLSI implementation of H.264/AVC intra-frame transcoder. ICECS (2011)
Nicolas Marques, Hassan Rabah, Eric Dabellani, Serge Weber
Efficient reconfigurable entropy coder for embedded multi-standards video adaptation. CVPR Workshops (2011)
Slavisa Jovanovic, Camel Tanougast, Serge Weber, Christophe Bobda
A new deadlock-free fault-tolerant routing algorithm for NoC interconnections. FPL (2009)
Michael Guarisco, Hassan Rabah, Yves Berviller, Serge Weber, Said Belkouch
FPGA-based SoC for transcoding H264/AVC-SVC with low latency and high bitrate entropy coding. SoCC (2009)
Camel Tanougast, Michael Janiaut, Yves Berviller, Hassan Rabah, Serge Weber, Ahmed Bouridane
An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis. IEEE Trans. Circuits Syst. Video Technol. 19 (2) (2009)
Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber
CuNoC: A dynamic scalable communication structure for dynamically reconfigurable FPGAs. Microprocess. Microsystems 33 (1) (2009)
Camel Tanougast, Serge Weber, Gilles Millerioux, Jamal Daafouz, Ahmed Bouridane
VLSI Architecture and FPGA Implementation of a Hybrid Message-Embedded Self-Synchronizing Stream Cipher. DELTA (2008)
Slavisa Jovanovic, Camel Tanougast, Serge Weber
A new high-performance scalable dynamic interconnection for FPGA-based reconfigurable systems. ASAP (2008)
Xun Zhang, Hassan Rabah, Serge Weber
An Auto-adaptation Method for Dynamically Reconfigurable System-on-Chip. ISVLSI (2008)
Slavisa Jovanovic, Camel Tanougast, Serge Weber
A New Self-Managing Hardware Design Approach for FPGA-based Reconfigurable Systems. ARC (2008)
Ting Liu, Camel Tanougast, Serge Weber
A framework of architectural synthesis for dynamically reconfigurable FPGAs. SoCC (2008)
Xun Zhang, Hassan Rabah, Serge Weber
Dynamic Slowdown and Partial Reconfiguration to Optimize Energy in FPGA Based Auto-adaptive SoPC. DELTA (2008)
Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber
A Dynamic Communication Structure for Dynamically Reconfigurable FPGAs. ReCoSoC (2007)
Xun Zhang, Hassan Rabah, Serge Weber
Cluster-Based Hybrid Reconfigurable Architecture for Auto-adaptive SoC. ICECS (2007)
Camel Tanougast, Serge Weber, Gilles Millerioux, Ahmed Bouridane, Jamal Daafouz
An Fpga implementation of the HME self-synchronizing stream cipher for Enhanced security and performance. AHS (2007)
Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation. J. Univers. Comput. Sci. 13 (3) (2007)
Xun Zhang, Hassan Rabah, Serge Weber
Auto-adaptive reconfigurable architecture for scalable multimedia applications. AHS (2007)
Slavisa Jovanovic, Camel Tanougast, Serge Weber
A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems. AHS (2007)
Slavisa Jovanovic, Camel Tanougast, Christophe Bobda, Serge Weber
CuNoC: A Scalable Dynamic NoC for Dynamically Reconfigurable FPGAs. FPL (2007)
Ting Liu, Camel Tanougast, Serge Weber
Toward a methodology for optimizing algorithm-architecture adequacy for implementation reconfigurable system. ICECS (2006)
Michael Janiaut, Camel Tanougast, Hassan Rabah, Yves Berviller, Christian Mannino, Serge Weber
Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis. FPL (2005)
Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. IEEE International Workshop on Rapid System Prototyping (2004)
Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber
FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T. FPL (2004)
Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber
FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T. ESA/VLSI (2004)
Camel Tanougast, Yves Berviller, Serge Weber, Philippe Brunet
A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems. EURASIP J. Adv. Signal Process. 2003 (6) (2003)
Hassan Rabah, Hervé Mathias, Serge Weber, Eril Mozef, Camel Tanougast
Linear array processors with multiple access modes memory for real-time image processing. Real Time Imaging 9 (3) (2003)
Philippe Brunet, Camel Tanougast, Yves Berviller, Serge Weber
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design. IWSOC (2003)
Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber
Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design. IPDPS (2003)
Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber, Hassan Rabah
Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system. Microprocess. Microsystems 27 (3) (2003)
Hassan Rabah, Hervé Mathias, Eril Mozef, Domingo Torres, Serge Weber
Linear array processors with multiple access modes memory for real-time image processing. APCCAS (1) (2002)
Sylvain Poussier, Hassan Rabah, Serge Weber
SOPC-based Embedded Smart Strain Gage Sensor. FPL (2002)
Camel Tanougast, Yves Berviller, Serge Weber
Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. IPDPS Workshops (2000)
Domingo Torres, Hervé Mathias, Hassan Rabah, Serge Weber
SIMD/restricted MIMD parallel architecture for Image Processing Based on a New Design of a Multi-mode Access Memory. PDPTA (1999)
Eril Mozef, Serge Weber, Jamal Jaber, Claude Bataille
LAPCAM, Linear Array of Processors Using Content-Addressable Memories: A New Design of Machine Vision for Parallel Image Computations. MVA (1996)
Eril Mozef, Serge Weber, Jamal Jaber, Etienne Tisserand
Parallel architecture dedicated to connected component analysis. ICPR (1996)