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A Hardware Preemptive Multitasking Mechanism Based on Scan-path Register Structure for FPGA-based Reconfigurable Systems.
Slavisa Jovanovic
Camel Tanougast
Serge Weber
Published in:
AHS (2007)
Keyphrases
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hardware implementation
low cost
field programmable gate array
scan path
computer systems
embedded systems
computing systems
image sequences
hardware design
real time
computer vision
pairwise
hardware architecture
dynamic reconfiguration