Samar Abdi

Publication Activity (10 Years)

Years Active: 2002-2022
Publications (10 Years): 4

Top Topics

Design Space Exploration

Computing Power

Embedded Systems

Top Venues

Publications

Ehsan Saboori, Samar Abdi
Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping. CoRR (2022)
Ehsan Saboori, Samar Abdi
Rapid design space exploration of multi-clock domain MPSoCs with hybrid prototyping. CCECE (2016)
Samar Abdi, Umair Aftab, Gordon Bailey, Bochra Boughzala, Faras Dewal, Shafigh Parsazad, Eric Tremblay
PFPSim: A Programmable Forwarding Plane Simulator. ANCS (2016)
Ehsan Saboori, Samar Abdi
Fast and cycle-accurate simulation of multi-threaded applications on SMP architectures using hybrid prototyping. CODES+ISSS (2016)
Zaid Al-Khatib, Samar Abdi
Operand-Value-Based Modeling of Dynamic Energy Consumption of Soft Processors in FPGA. ARC (2015)
Paul Leons, Aryan Yaghoubian, Glenn E. R. Cowan, Jelena Trajkovic, Yvon Nazon, Samar Abdi
On improving the range of inductive proximity sensors for avionic applications. ISQED (2015)
Ali Barzegar, Ehsan Saboori, Samar Abdi
DRAC: a dynamically reconfigurable active L1 cache model for hybrid prototyping of multicore embedded systems. RSP (2014)
Jacopo Panerati, Samar Abdi, Giovanni Beltrame
Balancing system availability and lifetime with dynamic hidden Markov models. AHS (2014)
Richard Lee, Samar Abdi, Frederic Risacher
Early and Accurate Modeling of Streaming Embedded Applications. EUROMICRO-SEAA (2013)
Parthasarathy Ravishankar, Samar Abdi
pCache: An Observable L1 Data Cache Model for FPGA Prototyping of Embedded Systems. DSD (2013)
Richard Lee, Karim Abdel-Khalek, Samar Abdi, Frederic Risacher
Early system level modeling of real-time applications on embedded platforms. ISQED (2013)
Ehsan Saboori, Samar Abdi
Hybrid prototyping of multicore embedded systems. DATE (2013)
Hansu Cho, Lochi Yu, Samar Abdi
Automatic Generation of Transducer Models for Bus-Based MPSoC Design. IEEE Trans. Computers 62 (2) (2013)
Jelena Trajkovic, Samar Abdi, Gabriela Nicolescu, Daniel D. Gajski
Automated Generation of Custom Processor Core from C Code. J. Electr. Comput. Eng. 2012 (2012)
Richard Lee, Samar Abdi, Doug Regehr, Frederic Risacher
System level modeling of real-time embedded software. ICCD (2012)
Samar Abdi, Yonghyun Hwang, Lochi Yu, Gunar Schirner, Daniel D. Gajski
Automatic TLM Generation for Early Validation of Multicore Systems. IEEE Des. Test Comput. 28 (3) (2011)
Hansu Cho, Samar Abdi
Automatic generation of transducer models for multicore system design. HLDVT (2011)
Samar Abdi
TLM automation for multi-core design. ASP-DAC (2010)
Samar Abdi
Automatic generation of host-compiled timed TLMs for high level design. HLDVT (2010)
Yonghyun Hwang, Gunar Schirner, Samar Abdi, Daniel D. Gajski
Accurate timed RTOS model for transaction level modeling. DATE (2010)
Samar Abdi, Yonghyun Hwang, Lochi Yu, Hansu Cho, Ines Viskic, Daniel D. Gajski
Embedded system environment: A framework for TLM-based design and prototyping. International Symposium on Rapid System Prototyping (2010)
Yonghyun Hwang, Gunar Schirner, Samar Abdi
Automatic Generation of Cycle-Approximate TLMs with Timed RTOS Model Support. IESS (2009)
Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho, Yonghyun Hwang, Lochi Yu, Daniel Gajski
Hardware-dependent software synthesis for many-core embedded systems. ASP-DAC (2009)
Samar Abdi, Daniel Gajski, Ines Viskic
Model Based Synthesis of Embedded Software. J. Softw. 4 (7) (2009)
Rainer Dömer, Andreas Gerstlauer, Junyu Peng, Dongwan Shin, Lukai Cai, Haobo Yu, Samar Abdi, Daniel D. Gajski
System-on-Chip Environment: A SpecC-Based Framework for Heterogeneous MPSoC Design. EURASIP J. Embed. Syst. 2008 (2008)
Yonghyun Hwang, Samar Abdi, Daniel Gajski
Cycle-approximate Retargetable Performance Estimation at the Transaction Level. DATE (2008)
Daniel D. Gajski, Samar Abdi, Ines Viskic
Model Based Synthesis of Embedded Software. SEUS (2008)
Ines Viskic, Samar Abdi, Daniel D. Gajski
Automatic generation of embedded communication SW for heterogeneous MPSoC platforms. LCTES (2007)
Hansu Cho, Samar Abdi, Daniel Gajski
Interface synthesis for heterogeneous multi-core systems from transaction level models. LCTES (2007)
Lucky L. Chi Yu Lo, Samar Abdi
Automatic TLM generation for C-Based MPSoC design. HLDVT (2007)
Lochi Yu, Samar Abdi
Automatic SystemC TLM generation for custom communication platforms. ICCD (2007)
Samar Abdi, Daniel Gajski
Verification of System Level Model Transformations. Int. J. Parallel Program. 34 (1) (2006)
Samar Abdi, Daniel Gajski
Transaction Routing and its Verification by Correct Model Transformations. HLDVT (2006)
Hansu Cho, Samar Abdi, Daniel Gajski
Design and implementation of transducer for ARM-TMS communication. ASP-DAC (2006)
Samar Abdi, Daniel D. Gajski
Functional Validation of System Level Static Scheduling. DATE (2005)
Junyu Peng, Samar Abdi, Daniel Gajski
A clustering technique to optimize hardware/software synchronization. ASP-DAC (2005)
Samar Abdi, Daniel Gajski
A formalism for functionality preserving system level transformations. ASP-DAC (2005)
Samar Abdi, Daniel Gajski
On deriving equivalent architecture model from system specification. ASP-DAC (2004)
Dongwan Shin, Samar Abdi, Daniel Gajski
Automatic generation of bus functional models from transaction level models. ASP-DAC (2004)
Samar Abdi, Daniel Gajski
Automatic generation of equivalent architecture model from functional specification. DAC (2004)
Samar Abdi, Daniel Gajski
Model validation for mapping specification behaviors to processing elements. HLDVT (2004)
Samar Abdi, Dongwan Shin, Daniel Gajski
Automatic communication refinement for system level design. DAC (2003)
Junyu Peng, Samar Abdi, Daniel Gajski
Automatic Model Refinement for Fast Architecture Exploration. VLSI Design (2002)