Salim Ullah

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 34

Top Topics

Highly Accurate

Short Term Load Forecasting

Trained Neural Networks

Top Venues

ACM Great Lakes Symposium on VLSI

Publications

Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (6) (2024)
Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. ACM Trans. Reconfigurable Technol. Syst. 17 (2) (2024)
Rohit Ranjan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks. ASP-DAC (2023)
Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators. ACM Trans. Embed. Comput. Syst. 22 (5s) (2023)
Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. CoRR (2023)
Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling. CoRR (2023)
Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators. ACM Great Lakes Symposium on VLSI (2023)
Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
NetPU-M: a Generic Reconfigurable Neural Network Accelerator Architecture for MLPs. IPDPS Workshops (2023)
Yuankang Zhao, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories. IEEE Embed. Syst. Lett. 15 (4) (2023)
Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
High-Flexibility Designs of Quantized Runtime Reconfigurable Multi-Precision Multipliers. IEEE Embed. Syst. Lett. 15 (4) (2023)
Salim Ullah, Siva Satyendra Sahoo, Nemath Ahmed, Debabrata Chaudhury, Akash Kumar
: Designing Application-specific Approximate Operators for FPGA-based Embedded Systems. ACM Trans. Embed. Comput. Syst. 21 (3) (2022)
Yuhao Liu, Shubham Rai, Salim Ullah, Akash Kumar
NetPU: Prototyping a Generic Reconfigurable Neural Network Accelerator Architecture. FPT (2022)
Amritha Immaneni, Salim Ullah, Suresh Nambi, Siva Satyendra Sahoo, Akash Kumar
PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML. DSD (2022)
Negar Neda, Salim Ullah, Azam Ghanbari, Hoda Mahdiani, Mehdi Modarressi, Akash Kumar
Multi-Precision Deep Neural Network Acceleration on FPGAs. ASP-DAC (2022)
Fanny Spagnolo, Salim Ullah, Pasquale Corsonello, Akash Kumar
ERMES: Efficient Racetrack Memory Emulation System based on FPGA. FPL (2022)
Salim Ullah, Semeen Rehman, Muhammad Shafique, Akash Kumar
High-Performance Accurate and Approximate Multipliers for FPGA-Based Hardware Accelerators. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (2) (2022)
Siva Satyendra Sahoo, Akhil Raj Baranwal, Salim Ullah, Akash Kumar
: A Memory-oriented Optimization Approach to Reinforcement Learning on FPGA-based Embedded Systems. ACM Great Lakes Symposium on VLSI (2021)
Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems. DAC (2021)
Salim Ullah, Tuan Duy Anh Nguyen, Akash Kumar
Energy-Efficient Low-Latency Signed Multiplier for FPGA-Based Hardware Accelerators. IEEE Embed. Syst. Lett. 13 (2) (2021)
Suresh Nambi, Salim Ullah, Siva Satyendra Sahoo, Aditya Lohana, Farhad Merchant, Akash Kumar
ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems. IEEE Access 9 (2021)
Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (9) (2021)
Salim Ullah, Hendrik Schmidl, Siva Satyendra Sahoo, Semeen Rehman, Akash Kumar
Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures. IEEE Trans. Computers 70 (3) (2021)
Arlene John, Salim Ullah, Akash Kumar, Barry Cardiff, Deepu John
An Approximate Binary Classifier for Data Integrity Assessment in IoT Sensors. ICECS (2020)
Siddharth Gupta, Salim Ullah, Kapil Ahuja, Aruna Tiwari, Akash Kumar
ALigN: A Highly Accurate Adaptive Layerwise Log_2_Lead Quantization of Pre-Trained Neural Networks. IEEE Access 8 (2020)
Zahra Ebrahimi, Salim Ullah, Akash Kumar
SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy. ACM Great Lakes Symposium on VLSI (2020)
Zahra Ebrahimi, Salim Ullah, Akash Kumar
LeAp: Leading-one Detection-based Softcore Approximate Multipliers with Tunable Accuracy. ASP-DAC (2020)
Zahra Ebrahimi, Salim Ullah, Akash Kumar
SIMDive: Approximate SIMD Soft Multiplier-Divider for FPGAs with Tunable Accuracy. CoRR (2020)
Salim Ullah, Siddharth Gupta, Kapil Ahuja, Aruna Tiwari, Akash Kumar
L2L: A Highly Accurate Log_2_Lead Quantization of Pre-trained Neural Networks. DATE (2020)
Suresh Nambi, Salim Ullah, Aditya Lohana, Siva Satyendra Sahoo, Farhad Merchant, Akash Kumar
ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-based Systems. CoRR (2020)
Adarsha Balaji, Salim Ullah, Anup Das, Akash Kumar
Design Methodology for Embedded Approximate Artificial Neural Networks. ACM Great Lakes Symposium on VLSI (2019)
Rahim Ullah, Nadeem Javaid, Ghulam Hafeez, Salim Ullah, Fahad Ahmad, Ashraf Ullah
A Comparative Analysis of Neural Networks and Enhancement of ELM for Short Term Load Forecasting. CISIS (2019)
Salim Ullah, Sanjeev Sripadraj Murthy, Akash Kumar
: library of FPGA-based approximate multipliers. DAC (2018)
Bharath Srinivas Prabakaran, Semeen Rehman, Muhammad Abdullah Hanif, Salim Ullah, Ghazal Mazaheri, Akash Kumar, Muhammad Shafique
DeMAS: An efficient design methodology for building approximate adders for FPGA-based systems. DATE (2018)
Salim Ullah, Semeen Rehman, Bharath Srinivas Prabakaran, Florian Kriebel, Muhammad Abdullah Hanif, Muhammad Shafique, Akash Kumar
Area-optimized low-latency approximate multipliers for FPGA-based hardware accelerators. DAC (2018)