Siva Satyendra Sahoo

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 31

Top Topics

Embedded Systems

Reinforcement Learning

Top Venues

ACM Trans. Embed. Comput. Syst.

Publications

Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
AxOCS: Scaling FPGA-Based Approximate Operators Using Configuration Supersampling. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (6) (2024)
Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. ACM Trans. Reconfigurable Technol. Syst. 17 (2) (2024)
Rohit Ranjan, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
SyFAxO-GeN: Synthesizing FPGA-Based Approximate Operators with Generative Networks. ASP-DAC (2023)
Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
: A Tree Search Approach to Synthesizing FPGA-based Approximate Operators. ACM Trans. Embed. Comput. Syst. 22 (5s) (2023)
Siva Satyendra Sahoo, Salim Ullah, Akash Kumar
AxOMaP: Designing FPGA-based Approximate Arithmetic Operators using Mathematical Programming. CoRR (2023)
Siva Satyendra Sahoo, Salim Ullah, Soumyo Bhattacharjee, Akash Kumar
AxOCS: Scaling FPGA-based Approximate Operators using Configuration Supersampling. CoRR (2023)
Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
CoOAx: Correlation-aware Synthesis of FPGA-based Approximate Operators. ACM Great Lakes Symposium on VLSI (2023)
Yuankang Zhao, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
NvMISC: Toward an FPGA-Based Emulation Platform for RISC-V and Nonvolatile Memories. IEEE Embed. Syst. Lett. 15 (4) (2023)
Salim Ullah, Siva Satyendra Sahoo, Nemath Ahmed, Debabrata Chaudhury, Akash Kumar
: Designing Application-specific Approximate Operators for FPGA-based Embedded Systems. ACM Trans. Embed. Comput. Syst. 21 (3) (2022)
Amritha Immaneni, Salim Ullah, Suresh Nambi, Siva Satyendra Sahoo, Akash Kumar
PosAx-O: Exploring Operator-level Approximations for Posit Arithmetic in Embedded AI/ML. DSD (2022)
Behnaz Ranjbar, Ali Hosseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar
BOT-MICS: Bounding Time Using Analytics in Mixed-Criticality Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (10) (2022)
Siva Satyendra Sahoo, Akhil Raj Baranwal, Salim Ullah, Akash Kumar
: A Memory-oriented Optimization Approach to Reinforcement Learning on FPGA-based Embedded Systems. ACM Great Lakes Symposium on VLSI (2021)
Siva Satyendra Sahoo, Akash Kumar
Using Monte Carlo Tree Search for EDA - A Case-study with Designing Cross-layer Reliability for Heterogeneous Embedded Systems. VLSI-SoC (2021)
Siva Satyendra Sahoo, Akash Kumar, Martin Decky, Samuel Chang Bing Wong, Geoff V. Merrett, Yinyuan Zhao, Jiachen Wang, Xiaohang Wang, Amit Kumar Singh
Emergent design challenges for embedded systems and paths forward: mixed-criticality, energy, reliability and security perspectives. CODES+ISSS (2021)
Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
CLAppED: A Design Framework for Implementing Cross-Layer Approximation in FPGA-based Embedded Systems. DAC (2021)
Suresh Nambi, Salim Ullah, Siva Satyendra Sahoo, Aditya Lohana, Farhad Merchant, Akash Kumar
ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-Based Systems. IEEE Access 9 (2021)
Behnaz Ranjbar, Ali Hoseinghorban, Siva Satyendra Sahoo, Alireza Ejlali, Akash Kumar
Improving the Timing Behaviour of Mixed-Criticality Systems Using Chebyshev's Theorem. DATE (2021)
Siva Satyendra Sahoo, Akash Kumar
CLEO-CoDe: Exploiting Constrained Decoding for Cross-Layer Energy Optimization in Heterogeneous Embedded Systems. VLSI-SoC (2021)
Akhil Raj Baranwal, Salim Ullah, Siva Satyendra Sahoo, Akash Kumar
ReLAccS: A Multilevel Approach to Accelerator Design for Reinforcement Learning on FPGA-Based Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (9) (2021)
Salim Ullah, Hendrik Schmidl, Siva Satyendra Sahoo, Semeen Rehman, Akash Kumar
Area-Optimized Accurate and Approximate Softcore Signed Multiplier Architectures. IEEE Trans. Computers 70 (3) (2021)
Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
CL(R)Early: An Early-stage DSE Methodology for Cross-Layer Reliability-aware Heterogeneous Embedded Systems. DAC (2020)
Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
Markov Chain-based Modeling and Analysis of Checkpointing with Rollback Recovery for Efficient DSE in Soft Real-time Systems. DFT (2020)
Shubham Rai, Michael Raitza, Siva Satyendra Sahoo, Akash Kumar
DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies. DATE (2020)
Suresh Nambi, Salim Ullah, Aditya Lohana, Siva Satyendra Sahoo, Farhad Merchant, Akash Kumar
ExPAN(N)D: Exploring Posits for Efficient Artificial Neural Network Design in FPGA-based Systems. CoRR (2020)
Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
A Hybrid Agent-based Design Methodology for Dynamic Cross-layer Reliability in Heterogeneous Embedded Systems. DAC (2019)
Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
Multi-objective design space exploration for system partitioning of FPGA-based Dynamic Partially Reconfigurable Systems. Integr. 67 (2019)
Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
QoS-Aware Cross-Layer Reliability-Integrated FPGA-Based Dynamic Partially Reconfigurable System Partitioning. FPT (2018)
Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
CLRFrame: An Analysis Framework for Designing Cross-Layer Reliability in Embedded Systems. VLSI Design (2018)
Siva Satyendra Sahoo, Tuan D. A. Nguyen, Bharadwaj Veeravalli, Akash Kumar
Lifetime-aware design methodology for dynamic partially reconfigurable systems. ASP-DAC (2018)
Siva Satyendra Sahoo, Bharadwaj Veeravalli, Akash Kumar
Cross-layer fault-tolerant design of real-time systems. DFT (2016)
Siva Satyendra Sahoo, Akash Kumar, Bharadwaj Veeravalli
Design and evaluation of reliability-oriented task re-mapping in MPSoCs using time-series analysis of intermittent faults. DATE (2016)