Riduan Khaddam-Aljameh

Publication Activity (10 Years)

Years Active: 2019-2022
Publications (10 Years): 10

Top Topics

Random Access Memory

Scales Linearly

Top Venues

IBM J. Res. Dev.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Brändli, Feng Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou
PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs. IEEE J. Solid State Circuits 57 (4) (2022)
Manuel Le Gallo, S. R. Nandakumar, Lazar Ciric, Irem Boybat, Riduan Khaddam-Aljameh, Charles Mackin, Abu Sebastian
Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars. Neuromorph. Comput. Eng. 2 (1) (2022)
Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic, Athanasios Vasilopoulos, Benedikt Kersting, Martino Dazzi, Geethan Karunaratne, Matthias Braendli, Abhairaj Singh, Silvia M. Mueller, Julian Büchel, Xavier Timoneda Comas, Vinay Joshi, Urs Egger, Angelo Garofalo, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Timothy Philip, Victor Chan, Mary Claire Silvestre, Ishtiaq Ahsan, Nicole Saulnier, Vijay Narayanan, Pier Andrea Francese, Evangelos Eleftheriou, Abu Sebastian
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. CoRR (2022)
Riduan Khaddam-Aljameh, Pier Andrea Francese, Luca Benini, Evangelos Eleftheriou
An SRAM-Based Multibit In-Memory Matrix-Vector Multiplier With a Precision That Scales Linearly in Area, Time, and Power. IEEE Trans. Very Large Scale Integr. Syst. 29 (2) (2021)
Riduan Khaddam-Aljameh, Michele Martemucci, Benedikt Kersting, Manuel Le Gallo, Robert L. Bruce, Matthew BrightSky, Abu Sebastian
A Multi-Memristive Unit-Cell Array With Diagonal Interconnects for In-Memory Computing. IEEE Trans. Circuits Syst. II Express Briefs 68 (12) (2021)
Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Braendli, F. Liu, A. Singh, S. M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, S. Choi, Injo Ok, F. L. Lie, Nicole Saulnier, V. Chan, I. Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing. VLSI Circuits (2021)
Michele Martemucci, Benedikt Kersting, Riduan Khaddam-Aljameh, Irem Boybat, S. R. Nandakumar, Urs Egger, Matthew BrightSky, Robert L. Bruce, Manuel Le Gallo, Abu Sebastian
Accurate Weight Mapping in a Multi-Memristive Synaptic Unit. ISCAS (2021)
S. R. Nandakumar, Manuel Le Gallo, Christophe Piveteau, Vinay Joshi, Giovanni Mariani, Irem Boybat, Geethan Karunaratne, Riduan Khaddam-Aljameh, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Bipin Rajendran, Abu Sebastian, Evangelos Eleftheriou
Mixed-precision deep learning based on computational memory. CoRR (2020)
Abu Sebastian, Irem Boybat, Martino Dazzi, Iason Giannopoulos, Vara Prasad Jonnalagadda, Vinay Joshi, Geethan Karunaratne, Benedikt Kersting, Riduan Khaddam-Aljameh, S. R. Nandakumar, Anastasios Petropoulos, Christophe Piveteau, Theodore Antonakopoulos, Bipin Rajendran, Manuel Le Gallo, Evangelos Eleftheriou
Computational memory-based inference and training of deep neural networks. VLSI Circuits (2019)
Evangelos Eleftheriou, Manuel Le Gallo, S. R. Nandakumar, Christophe Piveteau, Irem Boybat, Vinay Joshi, Riduan Khaddam-Aljameh, Martino Dazzi, Iason Giannopoulos, Geethan Karunaratne, Benedikt Kersting, Milos Stanisavljevic, Vara Prasad Jonnalagadda, Nikolas Ioannou, Kornilios Kourtis, Pier Andrea Francese, Abu Sebastian
Deep learning acceleration based on in-memory computing. IBM J. Res. Dev. 63 (6) (2019)